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a2ef5dc2c7
This fixes two bugs in PVH guests:
- Not setting EFER.NX means the NX bit in page table entries is
ignored on Intel processors and causes reserved bit page faults on
AMD processors.
- After the Xen commit 7645640d6ff1 ("x86/PVH: don't set EFER_SCE for
pvh guest") PVH guests are required to set EFER.SCE to enable the
SYSCALL instruction.
Secondary VCPUs are started with pagetables with the NX bit set so
EFER.NX must be set before using any stack or data segment.
xen_pvh_cpu_early_init() is the new secondary VCPU entry point that
sets EFER before jumping to cpu_bringup_and_idle().
Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
19 lines
488 B
C
19 lines
488 B
C
#ifndef _XEN_SMP_H
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extern void xen_send_IPI_mask(const struct cpumask *mask,
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int vector);
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extern void xen_send_IPI_mask_allbutself(const struct cpumask *mask,
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int vector);
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extern void xen_send_IPI_allbutself(int vector);
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extern void xen_send_IPI_all(int vector);
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extern void xen_send_IPI_self(int vector);
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#ifdef CONFIG_XEN_PVH
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extern void xen_pvh_early_cpu_init(int cpu, bool entry);
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#else
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static inline void xen_pvh_early_cpu_init(int cpu, bool entry)
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{
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}
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#endif
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#endif
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