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linux/arch/powerpc/platforms/cell
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Masato Noguchi 9476141c18 [POWERPC] spufs: don't set reserved bits in spu interrupt status 
This changes the spu context switch code to not write to reserved bits
of spu interrupt status register.
The architecture book says the reserved fields should be set to zero.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21 19:46:20 +11:00
..
spufs [POWERPC] spufs: don't set reserved bits in spu interrupt status 2007-12-21 19:46:20 +11:00
axon_msi.c Remove msic_dcr_read() in axon_msi.c 2007-10-15 14:29:49 -04:00
cbe_cpufreq.c [POWERPC] cell: Convert #include of asm/of_{platform, device}.h into linux/of_{platform, device}.h. 2007-12-19 01:00:02 +01:00
cbe_cpufreq.h [CELL] cbe_cpufreq: reorganize code 2007-07-20 21:41:38 +02:00
cbe_cpufreq_pervasive.c [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h 2007-10-09 21:01:56 +10:00
cbe_cpufreq_pmi.c [POWERPC] cell: Convert #include of asm/of_{platform, device}.h into linux/of_{platform, device}.h. 2007-12-19 01:00:02 +01:00
cbe_regs.c [POWERPC] cell/cbe_regs.c: Add missing of_node_put 2007-12-20 17:13:51 +11:00
cbe_thermal.c [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h 2007-10-09 21:01:56 +10:00
interrupt.c [POWERPC] Fix CONFIG_SMP=n build break 2007-11-08 14:15:30 +11:00
interrupt.h [POWERPC] cell: Add routines for managing PMU interrupts 2006-12-04 20:40:12 +11:00
io-workarounds.c [POWERPC] pci_controller->arch_data really is a struct device_node * 2007-12-11 13:42:37 +11:00
iommu.c [POWERPC] celleb: Split machine definition 2007-12-20 16:15:30 +11:00
Kconfig Device tree aware EMAC driver 2007-10-10 16:51:52 -07:00
Makefile [POWERPC] spufs: move fault, lscsa_alloc and switch code to spufs module 2007-12-21 19:46:19 +11:00
pervasive.c [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h 2007-10-09 21:01:56 +10:00
pervasive.h [POWERPC] cell: add RAS support 2006-06-21 15:01:29 +10:00
pmu.c [POWERPC] perfmon2: make pm_interval register read/write 2007-12-19 01:00:01 +01:00
ras.c [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h 2007-10-09 21:01:56 +10:00
ras.h [POWERPC] cell: add RAS support 2006-06-21 15:01:29 +10:00
setup.c [POWERPC] Cleanup calling mmio_nvram_init 2007-12-20 16:15:27 +11:00
smp.c [POWERPC] Cleanup SMT thread handling 2007-12-03 13:56:25 +11:00
spider-pic.c [POWERPC] Provide a default irq_host match, which matches on an exact of_node 2007-09-14 01:33:20 +10:00
spu_base.c [POWERPC] spufs: rework class 0 and 1 interrupt handling 2007-12-21 19:46:20 +11:00
spu_callbacks.c [POWERPC] cell: Remove DEBUG for SPU callbacks 2007-09-19 15:12:17 +10:00
spu_fault.c [POWERPC] spufs: move fault, lscsa_alloc and switch code to spufs module 2007-12-21 19:46:19 +11:00
spu_manage.c [POWERPC] cell: wrap master run control bit 2007-12-21 19:45:05 +11:00
spu_priv1_mmio.c [POWERPC] Celleb: consolidate spu management ops 2007-02-07 14:03:21 +11:00
spu_priv1_mmio.h [POWERPC] cell: abstract spu management routines 2006-12-04 20:40:39 +11:00
spu_syscalls.c [POWERPC] spufs: Handle errors in SPU coredump code, and support coredump to a pipe 2007-09-19 15:12:19 +10:00