mirror of
https://github.com/torvalds/linux
synced 2024-10-16 08:19:01 +00:00
0c6c2d3615
The arm64 code allocates an internal constant to every CPU feature it can detect, distinct from the public hwcap numbers we use to expose some features to userspace. Currently this is maintained manually which is an irritating source of conflicts when working on new features, to avoid this replace the header with a simple text file listing the names we've assigned and sort it to minimise conflicts. As part of doing this we also do the Kbuild hookup required to hook up an arch tools directory and to generate header files in there. This will result in a renumbering and reordering of the existing constants, since they are all internal only the values should not be important. The reordering will impact the order in which some steps in enumeration handle features but the algorithm is not intended to depend on this and I haven't seen any issues when testing. Due to the UAO cpucap having been removed in the past we end up with ARM64_NCAPS being 1 smaller than it was before. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20210428121231.11219-1-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
66 lines
1.1 KiB
Plaintext
66 lines
1.1 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
|
|
#
|
|
# Internal CPU capabilities constants, keep this list sorted
|
|
|
|
BTI
|
|
HAS_32BIT_EL0
|
|
HAS_32BIT_EL1
|
|
HAS_ADDRESS_AUTH
|
|
HAS_ADDRESS_AUTH_ARCH
|
|
HAS_ADDRESS_AUTH_IMP_DEF
|
|
HAS_AMU_EXTN
|
|
HAS_ARMv8_4_TTL
|
|
HAS_CACHE_DIC
|
|
HAS_CACHE_IDC
|
|
HAS_CNP
|
|
HAS_CRC32
|
|
HAS_DCPODP
|
|
HAS_DCPOP
|
|
HAS_E0PD
|
|
HAS_EPAN
|
|
HAS_GENERIC_AUTH
|
|
HAS_GENERIC_AUTH_ARCH
|
|
HAS_GENERIC_AUTH_IMP_DEF
|
|
HAS_IRQ_PRIO_MASKING
|
|
HAS_LDAPR
|
|
HAS_LSE_ATOMICS
|
|
HAS_NO_FPSIMD
|
|
HAS_NO_HW_PREFETCH
|
|
HAS_PAN
|
|
HAS_RAS_EXTN
|
|
HAS_RNG
|
|
HAS_SB
|
|
HAS_STAGE2_FWB
|
|
HAS_SYSREG_GIC_CPUIF
|
|
HAS_TLB_RANGE
|
|
HAS_VIRT_HOST_EXTN
|
|
HW_DBM
|
|
KVM_PROTECTED_MODE
|
|
MISMATCHED_CACHE_TYPE
|
|
MTE
|
|
SPECTRE_V2
|
|
SPECTRE_V3A
|
|
SPECTRE_V4
|
|
SSBS
|
|
SVE
|
|
UNMAP_KERNEL_AT_EL0
|
|
WORKAROUND_834220
|
|
WORKAROUND_843419
|
|
WORKAROUND_845719
|
|
WORKAROUND_858921
|
|
WORKAROUND_1418040
|
|
WORKAROUND_1463225
|
|
WORKAROUND_1508412
|
|
WORKAROUND_1542419
|
|
WORKAROUND_CAVIUM_23154
|
|
WORKAROUND_CAVIUM_27456
|
|
WORKAROUND_CAVIUM_30115
|
|
WORKAROUND_CAVIUM_TX2_219_PRFM
|
|
WORKAROUND_CAVIUM_TX2_219_TVM
|
|
WORKAROUND_CLEAN_CACHE
|
|
WORKAROUND_DEVICE_LOAD_ACQUIRE
|
|
WORKAROUND_NVIDIA_CARMEL_CNP
|
|
WORKAROUND_QCOM_FALKOR_E1003
|
|
WORKAROUND_REPEAT_TLBI
|
|
WORKAROUND_SPECULATIVE_AT
|