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dbf28e21ca
On new hardware, ucode images always come in pairs: code and data. Therefore, combine the variables into an appropriate struct and use that when both code and data are needed. Also, combine allocation and copying so that we have less code in total. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
176 lines
5 KiB
C
176 lines
5 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
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*
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* Portions of this file are derived from the ipw3945 project, as well
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* as portions of the ieee80211 subsystem header files.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#ifndef __iwl_helpers_h__
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#define __iwl_helpers_h__
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#include <linux/ctype.h>
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#include <net/mac80211.h>
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#include "iwl-io.h"
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#define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
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static inline struct ieee80211_conf *ieee80211_get_hw_conf(
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struct ieee80211_hw *hw)
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{
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return &hw->conf;
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}
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/**
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* iwl_queue_inc_wrap - increment queue index, wrap back to beginning
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* @index -- current index
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* @n_bd -- total number of entries in queue (must be power of 2)
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*/
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static inline int iwl_queue_inc_wrap(int index, int n_bd)
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{
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return ++index & (n_bd - 1);
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}
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/**
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* iwl_queue_dec_wrap - decrement queue index, wrap back to end
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* @index -- current index
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* @n_bd -- total number of entries in queue (must be power of 2)
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*/
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static inline int iwl_queue_dec_wrap(int index, int n_bd)
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{
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return --index & (n_bd - 1);
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}
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/*
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* we have 8 bits used like this:
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*
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* 7 6 5 4 3 2 1 0
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* | | | | | | | |
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* | | | | | | +-+-------- AC queue (0-3)
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* | | | | | |
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* | +-+-+-+-+------------ HW queue ID
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* |
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* +---------------------- unused
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*/
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static inline void iwl_set_swq_id(struct iwl_tx_queue *txq, u8 ac, u8 hwq)
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{
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BUG_ON(ac > 3); /* only have 2 bits */
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BUG_ON(hwq > 31); /* only use 5 bits */
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txq->swq_id = (hwq << 2) | ac;
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}
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static inline void iwl_wake_queue(struct iwl_priv *priv,
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struct iwl_tx_queue *txq)
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{
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u8 queue = txq->swq_id;
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u8 ac = queue & 3;
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u8 hwq = (queue >> 2) & 0x1f;
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if (test_and_clear_bit(hwq, priv->queue_stopped))
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if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0)
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ieee80211_wake_queue(priv->hw, ac);
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}
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static inline void iwl_stop_queue(struct iwl_priv *priv,
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struct iwl_tx_queue *txq)
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{
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u8 queue = txq->swq_id;
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u8 ac = queue & 3;
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u8 hwq = (queue >> 2) & 0x1f;
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if (!test_and_set_bit(hwq, priv->queue_stopped))
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if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0)
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ieee80211_stop_queue(priv->hw, ac);
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}
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static inline void iwl_wake_any_queue(struct iwl_priv *priv,
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struct iwl_rxon_context *ctx)
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{
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u8 ac;
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for (ac = 0; ac < AC_NUM; ac++) {
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IWL_DEBUG_INFO(priv, "Queue Status: Q[%d] %s\n",
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ac, (atomic_read(&priv->queue_stop_count[ac]) > 0)
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? "stopped" : "awake");
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iwl_wake_queue(priv, &priv->txq[ctx->ac_to_queue[ac]]);
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}
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}
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#define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
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#define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
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static inline void iwl_disable_interrupts(struct iwl_priv *priv)
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{
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clear_bit(STATUS_INT_ENABLED, &priv->status);
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/* disable interrupts from uCode/NIC to host */
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iwl_write32(priv, CSR_INT_MASK, 0x00000000);
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/* acknowledge/clear/reset any interrupts still pending
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* from uCode or flow handler (Rx/Tx DMA) */
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iwl_write32(priv, CSR_INT, 0xffffffff);
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iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
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IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
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}
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static inline void iwl_enable_rfkill_int(struct iwl_priv *priv)
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{
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IWL_DEBUG_ISR(priv, "Enabling rfkill interrupt\n");
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iwl_write32(priv, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
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}
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static inline void iwl_enable_interrupts(struct iwl_priv *priv)
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{
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IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
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set_bit(STATUS_INT_ENABLED, &priv->status);
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iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
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}
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/**
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* iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
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* @priv -- pointer to iwl_priv data structure
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* @tsf_bits -- number of bits need to shift for masking)
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*/
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static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
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u16 tsf_bits)
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{
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return (1 << tsf_bits) - 1;
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}
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/**
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* iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
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* @priv -- pointer to iwl_priv data structure
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* @tsf_bits -- number of bits need to shift for masking)
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*/
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static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
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u16 tsf_bits)
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{
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return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
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}
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#endif /* __iwl_helpers_h__ */
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