linux/drivers/net/dsa/sja1105
Vladimir Oltean 47c2c0c231 net: dsa: sja1105: match FDB entries regardless of inner/outer VLAN tag
On SJA1105P/Q/R/S and SJA1110, the L2 Lookup Table entries contain a
maskable "inner/outer tag" bit which means:
- when set to 1: match single-outer and double tagged frames
- when set to 0: match untagged and single-inner tagged frames
- when masked off: match all frames regardless of the type of tag

This driver does not make any meaningful distinction between inner tags
(matches on TPID) and outer tags (matches on TPID2). In fact, all VLAN
table entries are installed as SJA1110_VLAN_D_TAG, which means that they
match on both inner and outer tags.

So it does not make sense that we install FDB entries with the IOTAG bit
set to 1.

In VLAN-unaware mode, we set both TPID and TPID2 to 0xdadb, so the
switch will see frames as outer-tagged or double-tagged (never inner).
So the FDB entries will match if IOTAG is set to 1.

In VLAN-aware mode, we set TPID to 0x8100 and TPID2 to 0x88a8. So the
switch will see untagged and 802.1Q-tagged packets as inner-tagged, and
802.1ad-tagged packets as outer-tagged. So untagged and 802.1Q-tagged
packets will not match FDB entries if IOTAG is set to 1, but 802.1ad
tagged packets will. Strange.

To fix this, simply mask off the IOTAG bit from FDB entries, and make
them match regardless of whether the VLAN tag is inner or outer.

Fixes: 1da7382134 ("net: dsa: sja1105: Add FDB operations for P/Q/R/S series")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-02 14:28:28 +01:00
..
Kconfig net: dsa: sja1105: document the SJA1110 in the Kconfig 2021-06-24 12:55:57 -07:00
Makefile net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TX 2021-06-08 14:37:16 -07:00
sja1105.h net: dsa: sja1105: properly power down the microcontroller clock for SJA1110 2021-06-18 12:26:17 -07:00
sja1105_clocking.c net: dsa: sja1105: properly power down the microcontroller clock for SJA1110 2021-06-18 12:26:17 -07:00
sja1105_devlink.c net: dsa: propagate extack to .port_vlan_filtering 2021-02-14 17:38:12 -08:00
sja1105_dynamic_config.c net: dsa: sja1105: fix static FDB writes for SJA1110 2021-08-02 14:28:28 +01:00
sja1105_dynamic_config.h net: dsa: sja1105: add support for the SJA1110 switch family 2021-06-08 14:37:16 -07:00
sja1105_ethtool.c net: dsa: sja1105: don't use burst SPI reads for port statistics 2021-05-21 14:01:41 -07:00
sja1105_flower.c net: dsa: sja1105: dimension the data structures for a larger port count 2021-05-24 13:59:03 -07:00
sja1105_main.c net: dsa: sja1105: match FDB entries regardless of inner/outer VLAN tag 2021-08-02 14:28:28 +01:00
sja1105_mdio.c net: dsa: sja1105: plug in support for 2500base-x 2021-06-11 13:43:56 -07:00
sja1105_ptp.c net: dsa: sja1105: implement TX timestamping for SJA1110 2021-06-11 12:45:38 -07:00
sja1105_ptp.h net: dsa: sja1105: implement TX timestamping for SJA1110 2021-06-11 12:45:38 -07:00
sja1105_spi.c net: dsa: sja1105: properly power down the microcontroller clock for SJA1110 2021-06-18 12:26:17 -07:00
sja1105_static_config.c net: dsa: sja1105: allow the TTEthernet configuration in the static config for SJA1110 2021-06-18 12:26:17 -07:00
sja1105_static_config.h net: dsa: add support for the SJA1110 native tagging protocol 2021-06-11 12:45:38 -07:00
sja1105_tas.c net: dsa: sja1105: parameterize the number of ports 2021-05-24 13:59:03 -07:00
sja1105_tas.h net: dsa: sja1105: dimension the data structures for a larger port count 2021-05-24 13:59:03 -07:00
sja1105_vl.c net: dsa: sja1105: dimension the data structures for a larger port count 2021-05-24 13:59:03 -07:00
sja1105_vl.h net: dsa: sja1105: suppress -Wmissing-prototypes in sja1105_vl.c 2020-06-01 12:13:47 -07:00