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When KVM emulates the RDHWR instruction, decode the instruction more strictly. The rs field (bits 25:21) should be zero, as should bits 10:9. Bits 8:6 is the register select field in MIPSr6, so we aren't strict about those bits (no other operations should use that encoding space). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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.. | ||
00README.txt | ||
callback.c | ||
commpage.c | ||
commpage.h | ||
dyntrans.c | ||
emulate.c | ||
entry.c | ||
fpu.S | ||
interrupt.c | ||
interrupt.h | ||
Kconfig | ||
Makefile | ||
mips.c | ||
mmu.c | ||
msa.S | ||
stats.c | ||
tlb.c | ||
trace.h | ||
trap_emul.c |