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ability to get struct clk pointers from a struct clk_hw so that clk providers can consume the clks they provide, if they need to do something like that. This has been a long missing part of the clk provider API that will help us move away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are added for the clk_set_rate() "range" functions, similar to the tracepoints we already have for clk_set_rate() and we added a column to debugfs to help developers understand the hardware enable state of clks in case firmware or bootloader state is different than what is expected. Overall the core changes are mostly improving the clk driver writing experience. At the driver level, we have the usual collection of driver updates and new drivers for new SoCs. This time around the Qualcomm folks introduced a good handful of clk drivers for various parts of three or four SoCs. The SiFive folks added a new clk driver for their FU740 SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that for various new features. One last thing to note in the driver area is that the i.MX driver has gained a new binding to support SCU clks after being on the list for many months. It uses a two cell binding which is sort of rare in clk DT bindings. Beyond that we have the usual set of driver fixes and tweaks that come from more testing and finding out that some configuration was wrong or that a driver could support being built as a module. Core: - Add some trace points for clk_set_rate() "range" functions - Add hardware enable information to clk_summary debugfs - Replace clk-provider.h with of_clk.h when possible - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw New Drivers: - Bindings for Canaan K210 SoC clks - Support for SiFive FU740 PRCI - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs Updates: - DVFS support for AT91 clk driver - Update git repo branch for Renesas clock drivers - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E - Stop using __raw_*() I/O accessors in Renesas clk drivers - One more conversion of DT bindings to json-schema - Make i.MX clk-gate2 driver more flexible - New two cell binding for i.MX SCU clks - Drop of_match_ptr() in i.MX8 clk drivers - Add arch dependencies for Rockchip clk drivers - Fix i2s on Rockchip rk3066 - Add MIPI DSI clks on Amlogic axg and g12 SoCs - Support modular builds of Amlogic clk drivers - Fix an Amlogic Video PLL clock dependency - Samsung Kconfig dependencies updates for better compile test coverage - Refactoring of the Samsung PLL clocks driver - Small Tegra driver cleanups - Minor fixes to Ingenic and VC5 clk drivers - Cleanup patches to remove unused variables and plug memory leaks -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl/f/ycRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXjxg/7BJMFphpZmQb3iy/lZMYfgPh2yxZvrrBj zJ2i1mMru/C3BkXTx29HCJvj6/VC2HgGLL6fzfwe7oY3XVRT1Vxlsvka9vNZSNc2 UYNa8GUwR0mSXDzp5KnzoAQfLwvSqWUIeT8WB+Z+CJ7WIAGWnXgBlqsf/d/mr9hg JoAh+ROpbksL6hs61WJSm+7/Yu6efS0Yj0zzLZOINFWvDIOJ+Rp4g1u+qGH9tZyO I2Bik75Sc8hqvLUP5SVzI/1H4yLB0On+ADgVRwjvrKPVX56alYquOUMsU+sy4SeY ONQBki3vV5gtJHG1qvkwTC5/Yw20eUsrmrc7PNECvb1zo5Tp4QuOAR5nHCb4fg8u n7RRd1MktTAUAQxTzBaNYtix3Q19fjSR44C/1B6lKk6xkN+w4uYLi2GHrADy9rXa SwQVTKTGc8LjGywDaAOXdAyx2FMAtt1OvkTxZ238+aoHw5nQDHWKxu5TwYK6b5jG aEFzTCIEYlzRLqcZyGONSD0WXmQWyoNiPwJ3B7RDRfpg7dPESyKIB4MzGWiX9eDy lri/SoVH08c1sRf8AzIoi+CUNi8geTNAHHlJfiGznrv81ttVf3FioWyWLjr+SmBV rNxn35WxeDWoCZqtrLJlg5skVgmD8BRXLZTI9udPG8u6D7OdWdJBuMZ6EelO+OZg /n4w8tdo3cE= =Wt9O -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The core framework got some nice improvements this time around. We gained the ability to get struct clk pointers from a struct clk_hw so that clk providers can consume the clks they provide, if they need to do something like that. This has been a long missing part of the clk provider API that will help us move away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are added for the clk_set_rate() "range" functions, similar to the tracepoints we already have for clk_set_rate() and we added a column to debugfs to help developers understand the hardware enable state of clks in case firmware or bootloader state is different than what is expected. Overall the core changes are mostly improving the clk driver writing experience. At the driver level, we have the usual collection of driver updates and new drivers for new SoCs. This time around the Qualcomm folks introduced a good handful of clk drivers for various parts of three or four SoCs. The SiFive folks added a new clk driver for their FU740 SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that for various new features. One last thing to note in the driver area is that the i.MX driver has gained a new binding to support SCU clks after being on the list for many months. It uses a two cell binding which is sort of rare in clk DT bindings. Beyond that we have the usual set of driver fixes and tweaks that come from more testing and finding out that some configuration was wrong or that a driver could support being built as a module. Summary: Core: - Add some trace points for clk_set_rate() "range" functions - Add hardware enable information to clk_summary debugfs - Replace clk-provider.h with of_clk.h when possible - Add devm variant of clk_notifier_register() - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw New Drivers: - Bindings for Canaan K210 SoC clks - Support for SiFive FU740 PRCI - Camera clks on Qualcomm SC7180 SoCs - GCC and RPMh clks on Qualcomm SDX55 SoCs - RPMh clks on Qualcomm SM8350 SoCs - LPASS clks on Qualcomm SM8250 SoCs Updates: - DVFS support for AT91 clk driver - Update git repo branch for Renesas clock drivers - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E - Stop using __raw_*() I/O accessors in Renesas clk drivers - One more conversion of DT bindings to json-schema - Make i.MX clk-gate2 driver more flexible - New two cell binding for i.MX SCU clks - Drop of_match_ptr() in i.MX8 clk drivers - Add arch dependencies for Rockchip clk drivers - Fix i2s on Rockchip rk3066 - Add MIPI DSI clks on Amlogic axg and g12 SoCs - Support modular builds of Amlogic clk drivers - Fix an Amlogic Video PLL clock dependency - Samsung Kconfig dependencies updates for better compile test coverage - Refactoring of the Samsung PLL clocks driver - Small Tegra driver cleanups - Minor fixes to Ingenic and VC5 clk drivers - Cleanup patches to remove unused variables and plug memory leaks" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits) dt-binding: clock: Document canaan,k210-clk bindings dt-bindings: Add Canaan vendor prefix clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" clk: ingenic: Fix divider calculation with div tables clk: sunxi-ng: Make sure divider tables have sentinel clk: s2mps11: Fix a resource leak in error handling paths in the probe function clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 clk: si5351: Wait for bit clear after PLL reset clk: at91: sam9x60: remove atmel,osc-bypass support clk: at91: sama7g5: register cpu clock clk: at91: clk-master: re-factor master clock clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz clk: at91: sama7g5: decrease lower limit for MCK0 rate clk: at91: sama7g5: remove mck0 from parent list of other clocks clk: at91: clk-sam9x60-pll: allow runtime changes for pll clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics clk: at91: clk-master: add 5th divisor for mck master clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT dt-bindings: clock: at91: add sama7g5 pll defines clk: at91: sama7g5: fix compilation error ...
117 lines
4.2 KiB
Plaintext
117 lines
4.2 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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# Recent Exynos platforms should just select COMMON_CLK_SAMSUNG:
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config COMMON_CLK_SAMSUNG
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bool "Samsung Exynos clock controller support" if COMPILE_TEST
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select S3C64XX_COMMON_CLK if ARM && ARCH_S3C64XX
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select S5PV210_COMMON_CLK if ARM && ARCH_S5PV210
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select EXYNOS_3250_COMMON_CLK if ARM && SOC_EXYNOS3250
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select EXYNOS_4_COMMON_CLK if ARM && ARCH_EXYNOS4
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select EXYNOS_5250_COMMON_CLK if ARM && SOC_EXYNOS5250
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select EXYNOS_5260_COMMON_CLK if ARM && SOC_EXYNOS5260
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select EXYNOS_5410_COMMON_CLK if ARM && SOC_EXYNOS5410
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select EXYNOS_5420_COMMON_CLK if ARM && SOC_EXYNOS5420
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select EXYNOS_ARM64_COMMON_CLK if ARM64 && ARCH_EXYNOS
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config S3C64XX_COMMON_CLK
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bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung S3C64xx SoCs.
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Choose Y here only if you build for this SoC.
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config S5PV210_COMMON_CLK
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bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung S5Pv210 SoCs.
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Choose Y here only if you build for this SoC.
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config EXYNOS_3250_COMMON_CLK
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bool "Samsung Exynos3250 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos3250 SoCs. Choose Y here only if you build for this SoC.
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config EXYNOS_4_COMMON_CLK
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bool "Samsung Exynos4 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos4212 and Exynos4412 SoCs. Choose Y here only if you build for
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this SoC.
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config EXYNOS_5250_COMMON_CLK
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bool "Samsung Exynos5250 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos5250 SoCs. Choose Y here only if you build for this SoC.
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config EXYNOS_5260_COMMON_CLK
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bool "Samsung Exynos5260 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos5260 SoCs. Choose Y here only if you build for this SoC.
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config EXYNOS_5410_COMMON_CLK
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bool "Samsung Exynos5410 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos5410 SoCs. Choose Y here only if you build for this SoC.
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config EXYNOS_5420_COMMON_CLK
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bool "Samsung Exynos5420 clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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help
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Support for the clock controller present on the Samsung
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Exynos5420 SoCs. Choose Y here only if you build for this SoC.
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config EXYNOS_ARM64_COMMON_CLK
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bool "Samsung Exynos ARMv8-family clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
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config EXYNOS_AUDSS_CLK_CON
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tristate "Samsung Exynos AUDSS clock controller support"
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depends on COMMON_CLK_SAMSUNG
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default y if ARCH_EXYNOS
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help
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Support for the Audio Subsystem CLKCON clock controller present
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on some Exynos SoC variants. Choose M or Y here if you want to
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use audio devices such as I2S, PCM, etc.
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config EXYNOS_CLKOUT
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tristate "Samsung Exynos clock output driver"
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depends on COMMON_CLK_SAMSUNG
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default y if ARCH_EXYNOS
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help
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Support for the clock output (XCLKOUT) present on some of Exynos SoC
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variants. Usually the XCLKOUT is used to monitor the status of the
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certains clocks from SoC, but it could also be tied to other devices
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as an input clock.
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# For S3C24XX platforms, select following symbols:
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config S3C2410_COMMON_CLK
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bool "Samsung S3C2410 clock controller support" if COMPILE_TEST
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select COMMON_CLK_SAMSUNG
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help
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Build the s3c2410 clock driver based on the common clock framework.
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config S3C2410_COMMON_DCLK
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bool
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select COMMON_CLK_SAMSUNG
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select REGMAP_MMIO
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help
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Temporary symbol to build the dclk driver based on the common clock
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framework.
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config S3C2412_COMMON_CLK
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bool "Samsung S3C2412 clock controller support" if COMPILE_TEST
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select COMMON_CLK_SAMSUNG
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config S3C2443_COMMON_CLK
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bool "Samsung S3C2443 clock controller support" if COMPILE_TEST
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select COMMON_CLK_SAMSUNG
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