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https://github.com/torvalds/linux
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c8afe684c9
The snapdragon chips have multiple different display controllers, depending on which chip variant/version. (As far as I can tell, current devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And then external to the display controller are HDMI, DSI, etc. blocks which may be shared across devices which have different display controller blocks. To more easily add support for different display controller blocks, the display controller specific bits are split out into a "kms" module, which provides the kms plane/crtc/encoder objects. The external HDMI, DSI, etc. blocks are part encoder, and part connector currently. But I think I will pull in the drm_bridge patches from chromeos tree, and split them into a bridge+connector, with the registers that need to be set in modeset handled by the bridge. This would remove the 'msm_connector' base class. But some things need to be double checked to make sure I could get the correct ON/OFF sequencing.. This patch adds support for mdp4 crtc (including hw cursor), dtv encoder (part of MDP4 block), and hdmi. Signed-off-by: Rob Clark <robdclark@gmail.com>
142 lines
3.6 KiB
C
142 lines
3.6 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hdmi.h"
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struct hdmi_phy_8960 {
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struct hdmi_phy base;
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struct hdmi *hdmi;
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};
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#define to_hdmi_phy_8960(x) container_of(x, struct hdmi_phy_8960, base)
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static void hdmi_phy_8960_destroy(struct hdmi_phy *phy)
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{
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struct hdmi_phy_8960 *phy_8960 = to_hdmi_phy_8960(phy);
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kfree(phy_8960);
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}
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static void hdmi_phy_8960_reset(struct hdmi_phy *phy)
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{
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struct hdmi_phy_8960 *phy_8960 = to_hdmi_phy_8960(phy);
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struct hdmi *hdmi = phy_8960->hdmi;
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unsigned int val;
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val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
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if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
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/* pull low */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val & ~HDMI_PHY_CTRL_SW_RESET);
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} else {
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/* pull high */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val | HDMI_PHY_CTRL_SW_RESET);
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}
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if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
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/* pull low */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
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} else {
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/* pull high */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val | HDMI_PHY_CTRL_SW_RESET_PLL);
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}
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msleep(100);
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if (val & HDMI_PHY_CTRL_SW_RESET_LOW) {
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/* pull high */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val | HDMI_PHY_CTRL_SW_RESET);
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} else {
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/* pull low */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val & ~HDMI_PHY_CTRL_SW_RESET);
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}
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if (val & HDMI_PHY_CTRL_SW_RESET_PLL_LOW) {
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/* pull high */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val | HDMI_PHY_CTRL_SW_RESET_PLL);
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} else {
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/* pull low */
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hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
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val & ~HDMI_PHY_CTRL_SW_RESET_PLL);
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}
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}
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static void hdmi_phy_8960_powerup(struct hdmi_phy *phy,
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unsigned long int pixclock)
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{
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struct hdmi_phy_8960 *phy_8960 = to_hdmi_phy_8960(phy);
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struct hdmi *hdmi = phy_8960->hdmi;
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG0, 0x1b);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG1, 0xf2);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG4, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG5, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG6, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG7, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG8, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG9, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG10, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG11, 0x00);
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG3, 0x20);
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}
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static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy)
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{
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struct hdmi_phy_8960 *phy_8960 = to_hdmi_phy_8960(phy);
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struct hdmi *hdmi = phy_8960->hdmi;
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hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x7f);
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}
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static const struct hdmi_phy_funcs hdmi_phy_8960_funcs = {
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.destroy = hdmi_phy_8960_destroy,
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.reset = hdmi_phy_8960_reset,
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.powerup = hdmi_phy_8960_powerup,
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.powerdown = hdmi_phy_8960_powerdown,
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};
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struct hdmi_phy *hdmi_phy_8960_init(struct hdmi *hdmi)
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{
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struct hdmi_phy_8960 *phy_8960;
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struct hdmi_phy *phy = NULL;
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int ret;
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phy_8960 = kzalloc(sizeof(*phy_8960), GFP_KERNEL);
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if (!phy_8960) {
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ret = -ENOMEM;
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goto fail;
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}
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phy = &phy_8960->base;
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phy->funcs = &hdmi_phy_8960_funcs;
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phy_8960->hdmi = hdmi;
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return phy;
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fail:
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if (phy)
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hdmi_phy_8960_destroy(phy);
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return ERR_PTR(ret);
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}
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