linux/drivers/clk/meson
Stephen Boyd 4dea04c1f1 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
* Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJZRDQVAAoJEAFRo5MEFpTRaVgQAKqGVc39PNOGuzx8P2pj4H0B
 lhedpQu7XHTGc7/2/b8ezMwzgnlHnFsAJOnzpLj4FbUNbNSlJmJFaBfybbV1cgd+
 MF1cN9D5ssqI5zjkXeIhhZO6ogoe3AUlhjqKJMQfK2jlbQdF9Y9GrCIFFdzj/xC8
 pwI4UxRg1g0SGfsF76IaGWeBsduYr9kzZJ3Xr1zUIi32bn/peTaHL+Ye/tv8ssir
 NPnIXDte8XV+gmlOk0Ir1ELqIt501UfbljKmknU4FtVmOH9B/xkuxxOZU0w0Ia1o
 6uoXKDMVENQO+LFWifdexIKh5MV7fXC1wynYoiqTd0BiOA2vKryTo4lcqPblWA5T
 V95wIqwjsk6+XHl5uEFT7HPm2V5QEmBKzeDA4ng6hlGB7GYxZFhpzZQK4lnNrML0
 pB+crpY9/5lAdQlpC/XMkOHORhJ0862ktT45TplToprowWadnmLZBbHB7QcNe+iH
 z8v26eoh800YTN5KMfiSjPXNRW6GPS8YKJmT/9vx35+ysKFMD2fW2FmM7DL5LN+M
 Bv+fgbJSJ4slniqMzFCEVWfcMESGltAYKM8G2YpPUF1uf99SnRweFwf7tshPSvJ4
 bhvnqUdKsWxMgag3aL2D5eKq+yCRlk6/3zobq5qlCAomr9XDMm97C4CGmFUn40iV
 xiIzVBXoiydjJyaBLSzX
 =0BO9
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into clk-next

Pull Amlogic clk driver updates from Jerome Brunet:

 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
 * Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81

* tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson:
  clk: meson: gxbb: add all clk81 parents
  clk: meson: meson8b: add compatibles for Meson8 and Meson8m2
  clk: meson8b: export the ethernet gate clock
  clk: meson8b: export the USB clocks
  clk: meson8b: export the gate clock for the HW random number generator
  clk: meson8b: export the SDIO clock
  clk: meson8b: export the SAR ADC clocks
2017-06-16 15:01:46 -07:00
..
clk-audio-divider.c clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
clk-cpu.c clk: meson8b: clean up cpu clocks 2016-06-22 18:02:35 -07:00
clk-mpll.c clk: meson: mpll: use 64bit math in rate_from_params 2017-04-07 17:45:30 +02:00
clk-pll.c clk: meson: Add support for parameters for specific PLLs 2017-04-04 12:05:12 -07:00
clkc.h clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
gxbb-aoclk.c clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe() 2016-08-24 00:55:13 -07:00
gxbb.c * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH) 2017-06-16 15:01:46 -07:00
gxbb.h clk: meson-gxbb: Add EE 32K Clock for CEC 2017-05-29 12:34:23 +00:00
Kconfig * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH) 2017-06-16 15:01:46 -07:00
Makefile clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
meson8b.c clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 2017-06-12 07:33:08 +00:00
meson8b.h clk: meson8b: export the ethernet gate clock 2017-06-12 07:30:45 +00:00