mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
119537c092
o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
350 lines
8.8 KiB
C
350 lines
8.8 KiB
C
/*
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* ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
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* found on INDY and Indigo2 workstations.
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*
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* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
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* Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
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* Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
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* - Indigo2 changes
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* - Interrupt handling fixes
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* Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/irq_cpu.h>
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#include <asm/sgi/ioc.h>
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#include <asm/sgi/hpc3.h>
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#include <asm/sgi/ip22.h>
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/* #define DEBUG_SGINT */
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/* So far nothing hangs here */
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#undef USE_LIO3_IRQ
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struct sgint_regs *sgint;
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static char lc0msk_to_irqnr[256];
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static char lc1msk_to_irqnr[256];
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static char lc2msk_to_irqnr[256];
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static char lc3msk_to_irqnr[256];
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extern int ip22_eisa_init(void);
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static void enable_local0_irq(unsigned int irq)
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{
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/* don't allow mappable interrupt to be enabled from setup_irq,
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* we have our own way to do so */
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if (irq != SGI_MAP_0_IRQ)
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sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
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}
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static void disable_local0_irq(unsigned int irq)
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{
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sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
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}
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static struct irq_chip ip22_local0_irq_type = {
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.name = "IP22 local 0",
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.ack = disable_local0_irq,
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.mask = disable_local0_irq,
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.mask_ack = disable_local0_irq,
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.unmask = enable_local0_irq,
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};
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static void enable_local1_irq(unsigned int irq)
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{
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/* don't allow mappable interrupt to be enabled from setup_irq,
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* we have our own way to do so */
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if (irq != SGI_MAP_1_IRQ)
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sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
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}
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void disable_local1_irq(unsigned int irq)
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{
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sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
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}
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static struct irq_chip ip22_local1_irq_type = {
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.name = "IP22 local 1",
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.ack = disable_local1_irq,
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.mask = disable_local1_irq,
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.mask_ack = disable_local1_irq,
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.unmask = enable_local1_irq,
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};
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static void enable_local2_irq(unsigned int irq)
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{
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sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
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sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
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}
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void disable_local2_irq(unsigned int irq)
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{
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sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
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if (!sgint->cmeimask0)
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sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
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}
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static struct irq_chip ip22_local2_irq_type = {
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.name = "IP22 local 2",
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.ack = disable_local2_irq,
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.mask = disable_local2_irq,
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.mask_ack = disable_local2_irq,
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.unmask = enable_local2_irq,
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};
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static void enable_local3_irq(unsigned int irq)
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{
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sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
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sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
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}
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void disable_local3_irq(unsigned int irq)
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{
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sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
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if (!sgint->cmeimask1)
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sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
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}
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static struct irq_chip ip22_local3_irq_type = {
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.name = "IP22 local 3",
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.ack = disable_local3_irq,
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.mask = disable_local3_irq,
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.mask_ack = disable_local3_irq,
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.unmask = enable_local3_irq,
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};
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static void indy_local0_irqdispatch(void)
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{
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u8 mask = sgint->istat0 & sgint->imask0;
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u8 mask2;
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int irq;
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if (mask & SGINT_ISTAT0_LIO2) {
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mask2 = sgint->vmeistat & sgint->cmeimask0;
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irq = lc2msk_to_irqnr[mask2];
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} else
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irq = lc0msk_to_irqnr[mask];
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/* if irq == 0, then the interrupt has already been cleared */
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if (irq)
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do_IRQ(irq);
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}
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static void indy_local1_irqdispatch(void)
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{
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u8 mask = sgint->istat1 & sgint->imask1;
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u8 mask2;
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int irq;
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if (mask & SGINT_ISTAT1_LIO3) {
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mask2 = sgint->vmeistat & sgint->cmeimask1;
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irq = lc3msk_to_irqnr[mask2];
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} else
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irq = lc1msk_to_irqnr[mask];
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/* if irq == 0, then the interrupt has already been cleared */
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if (irq)
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do_IRQ(irq);
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}
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extern void ip22_be_interrupt(int irq);
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static void indy_buserror_irq(void)
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{
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int irq = SGI_BUSERR_IRQ;
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irq_enter();
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kstat_this_cpu.irqs[irq]++;
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ip22_be_interrupt(irq);
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irq_exit();
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}
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static struct irqaction local0_cascade = {
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.handler = no_action,
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.flags = IRQF_DISABLED,
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.name = "local0 cascade",
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};
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static struct irqaction local1_cascade = {
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.handler = no_action,
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.flags = IRQF_DISABLED,
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.name = "local1 cascade",
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};
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static struct irqaction buserr = {
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.handler = no_action,
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.flags = IRQF_DISABLED,
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.name = "Bus Error",
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};
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static struct irqaction map0_cascade = {
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.handler = no_action,
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.flags = IRQF_DISABLED,
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.name = "mapable0 cascade",
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};
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#ifdef USE_LIO3_IRQ
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static struct irqaction map1_cascade = {
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.handler = no_action,
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.flags = IRQF_DISABLED,
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.name = "mapable1 cascade",
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};
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#define SGI_INTERRUPTS SGINT_END
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#else
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#define SGI_INTERRUPTS SGINT_LOCAL3
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#endif
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extern void indy_r4k_timer_interrupt(void);
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extern void indy_8254timer_irq(void);
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/*
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* IRQs on the INDY look basically (barring software IRQs which we don't use
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* at all) like:
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*
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* MIPS IRQ Source
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* -------- ------
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* 0 Software (ignored)
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* 1 Software (ignored)
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* 2 Local IRQ level zero
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* 3 Local IRQ level one
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* 4 8254 Timer zero
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* 5 8254 Timer one
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* 6 Bus Error
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* 7 R4k timer (what we use)
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*
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* We handle the IRQ according to _our_ priority which is:
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*
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* Highest ---- R4k Timer
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* Local IRQ zero
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* Local IRQ one
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* Bus Error
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* 8254 Timer zero
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* Lowest ---- 8254 Timer one
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*
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* then we just return, if multiple IRQs are pending then we will just take
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* another exception, big deal.
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*/
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_status() & read_c0_cause();
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/*
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* First we check for r4k counter/timer IRQ.
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*/
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if (pending & CAUSEF_IP7)
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indy_r4k_timer_interrupt();
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else if (pending & CAUSEF_IP2)
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indy_local0_irqdispatch();
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else if (pending & CAUSEF_IP3)
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indy_local1_irqdispatch();
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else if (pending & CAUSEF_IP6)
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indy_buserror_irq();
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else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
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indy_8254timer_irq();
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}
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void __init arch_init_irq(void)
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{
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int i;
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/* Init local mask --> irq tables. */
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for (i = 0; i < 256; i++) {
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if (i & 0x80) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
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} else if (i & 0x40) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
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} else if (i & 0x20) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
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} else if (i & 0x10) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
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} else if (i & 0x08) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
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} else if (i & 0x04) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
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} else if (i & 0x02) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
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} else if (i & 0x01) {
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lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
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lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
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lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
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lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
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} else {
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lc0msk_to_irqnr[i] = 0;
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lc1msk_to_irqnr[i] = 0;
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lc2msk_to_irqnr[i] = 0;
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lc3msk_to_irqnr[i] = 0;
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}
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}
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/* Mask out all interrupts. */
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sgint->imask0 = 0;
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sgint->imask1 = 0;
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sgint->cmeimask0 = 0;
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sgint->cmeimask1 = 0;
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/* init CPU irqs */
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mips_cpu_irq_init();
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for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
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struct irq_chip *handler;
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if (i < SGINT_LOCAL1)
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handler = &ip22_local0_irq_type;
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else if (i < SGINT_LOCAL2)
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handler = &ip22_local1_irq_type;
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else if (i < SGINT_LOCAL3)
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handler = &ip22_local2_irq_type;
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else
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handler = &ip22_local3_irq_type;
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set_irq_chip_and_handler(i, handler, handle_level_irq);
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}
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/* vector handler. this register the IRQ as non-sharable */
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setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
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setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
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setup_irq(SGI_BUSERR_IRQ, &buserr);
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/* cascade in cascade. i love Indy ;-) */
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setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
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#ifdef USE_LIO3_IRQ
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setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
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#endif
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#ifdef CONFIG_EISA
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if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
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ip22_eisa_init ();
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#endif
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}
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