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https://github.com/torvalds/linux
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a21765a70e
The following patch and script moves the arch/arm/mach-s3c2410
directory into arch/arm/plat-s3c24xx for the generic core code
and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files
Include directory include/asm-arm/plat-s3c24xx is added for the
core include files.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
188 lines
4.2 KiB
C
188 lines
4.2 KiB
C
/* linux/arch/arm/plat-s3c24xx/gpio.c
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX GPIO support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/arch/regs-gpio.h>
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void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
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{
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void __iomem *base = S3C24XX_GPIO_BASE(pin);
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unsigned long mask;
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unsigned long con;
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unsigned long flags;
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if (pin < S3C2410_GPIO_BANKB) {
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mask = 1 << S3C2410_GPIO_OFFSET(pin);
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} else {
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mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
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}
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switch (function) {
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case S3C2410_GPIO_LEAVE:
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mask = 0;
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function = 0;
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break;
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case S3C2410_GPIO_INPUT:
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case S3C2410_GPIO_OUTPUT:
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case S3C2410_GPIO_SFN2:
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case S3C2410_GPIO_SFN3:
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if (pin < S3C2410_GPIO_BANKB) {
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function -= 1;
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function &= 1;
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function <<= S3C2410_GPIO_OFFSET(pin);
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} else {
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function &= 3;
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function <<= S3C2410_GPIO_OFFSET(pin)*2;
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}
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}
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/* modify the specified register wwith IRQs off */
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local_irq_save(flags);
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con = __raw_readl(base + 0x00);
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con &= ~mask;
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con |= function;
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__raw_writel(con, base + 0x00);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
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unsigned int s3c2410_gpio_getcfg(unsigned int pin)
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{
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void __iomem *base = S3C24XX_GPIO_BASE(pin);
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unsigned long val = __raw_readl(base);
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if (pin < S3C2410_GPIO_BANKB) {
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val >>= S3C2410_GPIO_OFFSET(pin);
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val &= 1;
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val += 1;
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} else {
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val >>= S3C2410_GPIO_OFFSET(pin)*2;
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val &= 3;
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}
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return val | S3C2410_GPIO_INPUT;
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}
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EXPORT_SYMBOL(s3c2410_gpio_getcfg);
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void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
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{
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void __iomem *base = S3C24XX_GPIO_BASE(pin);
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unsigned long offs = S3C2410_GPIO_OFFSET(pin);
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unsigned long flags;
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unsigned long up;
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if (pin < S3C2410_GPIO_BANKB)
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return;
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local_irq_save(flags);
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up = __raw_readl(base + 0x08);
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up &= ~(1L << offs);
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up |= to << offs;
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__raw_writel(up, base + 0x08);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(s3c2410_gpio_pullup);
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void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
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{
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void __iomem *base = S3C24XX_GPIO_BASE(pin);
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unsigned long offs = S3C2410_GPIO_OFFSET(pin);
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unsigned long flags;
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unsigned long dat;
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local_irq_save(flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offs);
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dat |= to << offs;
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(s3c2410_gpio_setpin);
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unsigned int s3c2410_gpio_getpin(unsigned int pin)
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{
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void __iomem *base = S3C24XX_GPIO_BASE(pin);
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unsigned long offs = S3C2410_GPIO_OFFSET(pin);
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return __raw_readl(base + 0x04) & (1<< offs);
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}
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EXPORT_SYMBOL(s3c2410_gpio_getpin);
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unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
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{
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unsigned long flags;
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unsigned long misccr;
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local_irq_save(flags);
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misccr = __raw_readl(S3C24XX_MISCCR);
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misccr &= ~clear;
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misccr ^= change;
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__raw_writel(misccr, S3C24XX_MISCCR);
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local_irq_restore(flags);
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return misccr;
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}
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EXPORT_SYMBOL(s3c2410_modify_misccr);
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int s3c2410_gpio_getirq(unsigned int pin)
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{
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if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15)
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return -1; /* not valid interrupts */
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if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
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return -1; /* not valid pin */
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if (pin < S3C2410_GPF4)
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return (pin - S3C2410_GPF0) + IRQ_EINT0;
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if (pin < S3C2410_GPG0)
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return (pin - S3C2410_GPF4) + IRQ_EINT4;
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return (pin - S3C2410_GPG0) + IRQ_EINT8;
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}
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EXPORT_SYMBOL(s3c2410_gpio_getirq);
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