linux/arch
Luc Van Oostenryck 889d746edd
riscv: add riscv-specific predefines to CHECKFLAGS
RISC-V uses the macro __riscv_xlen, predefined by GCC, to
make the distinction between 32 or 64 bit code.

However, sparse doesn't know anything about this macro
which lead to wrong warnings and failures.

Fix this by adding a define of __riscv_xlen to CHECKFLAGS
and add one for __riscv too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-06-11 09:03:43 -07:00
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alpha
arc
arm
arm64
c6x
h8300
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microblaze
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openrisc
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powerpc
riscv riscv: add riscv-specific predefines to CHECKFLAGS 2018-06-11 09:03:43 -07:00
s390 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux 2018-05-30 10:30:30 -05:00
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