linux/drivers/pci
dingtianhong 87e09cdec4 PCI: Disable Relaxed Ordering for some Intel processors
According to the Intel spec section 3.9.1 said:

    3.9.1 Optimizing PCIe Performance for Accesses Toward Coherent Memory
          and Toward MMIO Regions (P2P)

    In order to maximize performance for PCIe devices in the processors
    listed in Table 3-6 below, the soft- ware should determine whether the
    accesses are toward coherent memory (system memory) or toward MMIO
    regions (P2P access to other devices). If the access is toward MMIO
    region, then software can command HW to set the RO bit in the TLP
    header, as this would allow hardware to achieve maximum throughput for
    these types of accesses. For accesses toward coherent memory, software
    can command HW to clear the RO bit in the TLP header (no RO), as this
    would allow hardware to achieve maximum throughput for these types of
    accesses.

    Table 3-6. Intel Processor CPU RP Device IDs for Processors Optimizing
               PCIe Performance

    Processor                            CPU RP Device IDs

    Intel Xeon processors based on       6F01H-6F0EH
    Broadwell microarchitecture

    Intel Xeon processors based on       2F01H-2F0EH
    Haswell microarchitecture

It means some Intel processors has performance issue when use the Relaxed
Ordering Attribute, so disable Relaxed Ordering for these root port.

Signed-off-by: Casey Leedom <leedom@chelsio.com>
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Alexander Duyck <alexander.h.duyck@intel.com>
Acked-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-14 22:14:50 -07:00
..
dwc Merge branch 'pci/host-qcom' into next 2017-07-04 11:00:57 -05:00
endpoint PCI: endpoint: Select CRC32 to fix test build error 2017-06-12 15:46:13 -05:00
host PCI: rockchip: Check for pci_scan_root_bus_bridge() failure correctly 2017-07-12 12:50:11 -05:00
hotplug Annotation of module parameters that specify device settings 2017-05-10 19:13:03 -07:00
pcie Merge branch 'pm-pci' 2017-07-14 13:15:49 +02:00
switch Merge branch 'pci/switchtec' into next 2017-07-02 18:51:10 -05:00
access.c PCI: Provide Kconfig option for lockless config space accessors 2017-06-28 22:32:56 +02:00
ats.c PCI: Restore PRI and PASID state after Function-Level Reset 2017-05-30 15:40:50 -05:00
bus.c PCI: Autosense device removal in pci_bridge_d3_update() 2016-11-17 18:44:56 -06:00
ecam.c PCI: ECAM: Map config region with pci_remap_cfgspace() 2017-04-24 13:53:14 -05:00
host-bridge.c
hotplug-pci.c
htirq.c
iov.c PCI: Protect pci_driver->sriov_configure() usage with device_lock() 2017-06-14 17:41:19 -05:00
irq.c pci-v4.12-changes 2017-05-08 19:03:25 -07:00
Kconfig PCI: Provide Kconfig option for lockless config space accessors 2017-06-28 22:32:56 +02:00
Makefile PCI: Build setup-irq.o on all arches 2017-07-02 16:14:27 -05:00
mmap.c PCI: Add I/O BAR support to generic pci_mmap_resource_range() 2017-04-20 08:47:47 -05:00
msi.c pci-v4.13-changes 2017-07-08 15:51:57 -07:00
of.c
pci-acpi.c PM / core: Drop run_wake flag from struct dev_pm_info 2017-06-28 01:52:52 +02:00
pci-driver.c Merge branch 'pm-pci' 2017-07-14 13:15:49 +02:00
pci-label.c pci-v4.13-changes 2017-07-08 15:51:57 -07:00
pci-mid.c PCI / PM: Simplify device wakeup settings code 2017-06-28 01:52:45 +02:00
pci-stub.c
pci-sysfs.c Merge branch 'pci/virtualization' into next 2017-07-03 08:00:29 -05:00
pci.c Merge branch 'pm-pci' 2017-07-14 13:15:49 +02:00
pci.h Merge branch 'pm-pci' 2017-07-14 13:15:49 +02:00
probe.c PCI: Disable PCIe Relaxed Ordering if unsupported 2017-08-14 22:14:50 -07:00
proc.c PCI: Add BAR index argument to pci_mmap_page_range() 2017-04-20 08:47:47 -05:00
quirks.c PCI: Disable Relaxed Ordering for some Intel processors 2017-08-14 22:14:50 -07:00
remove.c PCI: Autosense device removal in pci_bridge_d3_update() 2016-11-17 18:44:56 -06:00
rom.c PCI: Add comments about ROM BAR updating 2016-11-29 18:05:09 -06:00
search.c PCI: Add device flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT 2017-04-13 18:49:50 -05:00
setup-bus.c PCI: Fix calculation of bridge window's size and alignment 2017-04-18 14:47:20 -05:00
setup-irq.c PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it 2017-07-02 16:14:28 -05:00
setup-res.c PCI: Make PCI_ROM_ADDRESS_MASK a 32-bit constant 2017-04-18 14:46:57 -05:00
slot.c locking/atomic, kref: Add kref_read() 2017-01-14 11:37:18 +01:00
syscall.c Replace <asm/uaccess.h> with <linux/uaccess.h> globally 2016-12-24 11:46:01 -08:00
vc.c
vpd.c
xen-pcifront.c xen: make use of xenbus_read_unsigned() in xen-pcifront 2016-11-07 13:55:26 +01:00