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852663d94f
Base the UART detection heuristic on architecturally defined MIDR register instead of implementation dependent CBAR. The only tile using the original memory map is V2P-CA9 with Cortex A9 r0p1, which MIDR contains value 0x410fc091. Signed-off-by: Pawel Moll <pawel.moll@arm.com> |
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asm | ||
debug | ||
uapi/asm |