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While no information about the H6 RSB controller is included in the datasheet or manual, the vendor BSP and power management blob both reference the RSB clock parent and register address. These values were verified by experimentation. Since this clock/reset are added late, the specifier is added at the end to maintain the existing DT binding. The code is kept in register order. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
20 lines
428 B
C
20 lines
428 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2017 Icenowy Zheng <icenowy@aosc.xyz>
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*/
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#ifndef _CCU_SUN50I_H6_R_H
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#define _CCU_SUN50I_H6_R_H
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#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
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#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
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/* AHB/APB bus clocks are not exported except APB1 for R_PIO */
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#define CLK_R_AHB 1
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#define CLK_R_APB2 3
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#define CLK_NUMBER (CLK_R_APB2_RSB + 1)
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#endif /* _CCU_SUN50I_H6_R_H */
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