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811a087c55
(UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs for exynos543x SoC AMBA AXI bus clocks needed for bus frequency scaling. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJXER7wAAoJEE1bIKeAnHqLkJIP/3QZKFAg94HtNPzmqvS8ZcyN DADbg2V3VAWSwWz3jwXz+NQOK5IDKmCnvxHQJdnm/0HpbXRW1C413KC+f84xq0zL Us4j7BvXemEyw2Gnv5VAiaEZ6iD/tj6HkCvq5Y12fWPFc1Bqpgf6ghxcADngc22j wj8V1RjJ5iXjGmlqYTEPDA7OXVA4sC2HLuWiUvehW56KAlzL6UfThXweiChBiDOh fockxKiYWVuxiFqd3GkhJGXjzK9RHzUGJSqCNjruIjyG0dekADZnm12nYjFjxym2 kL5sPI8Fo2UgzvAV8ax6Ln62uIqtzFhkZAeqkKZSJjEBryYHzAq8QVXS9iP+Ky+E 8VxZ6IGL1scoVU7g094LjyX9mP2p2PnZWvzCGdvK1qNjYzVO0ZjfXkoU71+JKoat JxjUQ2rZTNQGb3KeqfV5SJtE8ffP+9BE+y8K4EaczdYRMqf08pKuhY9c2IHuCEs3 mpPALIVOHMSh1s58gF26tMyY3vo/04Few63S9YH/mB7LEXeH6Xs7oHHsnMvsPu3N CVZwuQ8V/u1W4H7dCU2b9HzgqpxUfM97DbX5NtJH/1zdmpuzWVJxv8K5kT7cHRfi IKEjhqRuNAytXojXEL1HElgsPw0THtz+qdBOAxaNwPHZCE3kBLgL4U9hKMBWewx4 oPH4MjN6xv4sbezGaas7 =Sl7j -----END PGP SIGNATURE----- Merge tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next Pull samsung clk updates from Sylwester Nawrocki: This includes addition of some missing clock tree definitions (UART, MMC2 clocks) for exynos3250 SoC and exporting of IDs for exynos543x SoC AMBA AXI bus clocks needed for bus frequency scaling. * tag 'clk-v4.7-samsung' of git://linuxtv.org/snawrocki/samsung: clk: samsung: exynos542x: Add the clock id for ACLK dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC clk: samsung: exynos3250: Add MMC2 clock clk: samsung: exynos3250: Add UART2 clock dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250 |
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|---|---|---|
| .. | ||
| arm | ||
| clk | ||
| clock | ||
| dma | ||
| gpio | ||
| i2c | ||
| iio | ||
| input | ||
| interrupt-controller | ||
| leds | ||
| media | ||
| memory | ||
| mfd | ||
| net | ||
| phy | ||
| pinctrl | ||
| power | ||
| pwm | ||
| regulator | ||
| reset | ||
| soc | ||
| sound | ||
| spmi | ||
| thermal | ||