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8478132a87
This reverts commit 4dd1837d75.
Moving the exports for assembly code into the assembly files breaks
KSYM trimming, but also breaks modversions.
While fixing the KSYM trimming is trivial, fixing modversions brings
us to a technically worse position that we had prior to the above
change:
- We end up with the prototype definitions divorsed from everything
else, which means that adding or removing assembly level ksyms
become more fragile:
* if adding a new assembly ksyms export, a missed prototype in
asm-prototypes.h results in a successful build if no module in
the selected configuration makes use of the symbol.
* when removing a ksyms export, asm-prototypes.h will get forgotten,
with armksyms.c, you'll get a build error if you forget to touch
the file.
- We end up with the same amount of include files and prototypes,
they're just in a header file instead of a .c file with their
exports.
As for lines of code, we don't get much of a size reduction:
(original commit)
47 files changed, 131 insertions(+), 208 deletions(-)
(fix for ksyms trimming)
7 files changed, 18 insertions(+), 5 deletions(-)
(two fixes for modversions)
1 file changed, 34 insertions(+)
3 files changed, 7 insertions(+), 2 deletions(-)
which results in a net total of only 25 lines deleted.
As there does not seem to be much benefit from this change of approach,
revert the change.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
67 lines
1.2 KiB
ArmAsm
67 lines
1.2 KiB
ArmAsm
/*
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* linux/arch/arm/lib/io-writesl.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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ENTRY(__raw_writesl)
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teq r2, #0 @ do we have to check for the zero len?
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reteq lr
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ands ip, r1, #3
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bne 3f
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subs r2, r2, #4
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bmi 2f
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stmfd sp!, {r4, lr}
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1: ldmia r1!, {r3, r4, ip, lr}
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subs r2, r2, #4
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str r3, [r0, #0]
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str r4, [r0, #0]
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str ip, [r0, #0]
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str lr, [r0, #0]
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bpl 1b
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ldmfd sp!, {r4, lr}
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2: movs r2, r2, lsl #31
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ldmcsia r1!, {r3, ip}
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strcs r3, [r0, #0]
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ldrne r3, [r1, #0]
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strcs ip, [r0, #0]
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strne r3, [r0, #0]
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ret lr
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3: bic r1, r1, #3
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ldr r3, [r1], #4
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cmp ip, #2
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blt 5f
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bgt 6f
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4: mov ip, r3, lspull #16
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ldr r3, [r1], #4
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subs r2, r2, #1
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orr ip, ip, r3, lspush #16
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str ip, [r0]
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bne 4b
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ret lr
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5: mov ip, r3, lspull #8
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ldr r3, [r1], #4
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subs r2, r2, #1
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orr ip, ip, r3, lspush #24
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str ip, [r0]
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bne 5b
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ret lr
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6: mov ip, r3, lspull #24
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ldr r3, [r1], #4
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subs r2, r2, #1
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orr ip, ip, r3, lspush #8
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str ip, [r0]
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bne 6b
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ret lr
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ENDPROC(__raw_writesl)
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