linux/arch/avr32/mm
Haavard Skinnemoen ab61f7d21a [AVR32] Fix bug in invalidate_dcache_region()
If (start + size) is not cacheline aligned and (start & mask) > (end &
mask), the last but one cacheline won't be invalidated as it should.
Fix this by rounding `end' down to the nearest cacheline boundary if
it gets adjusted due to misalignment.

Also flush the write buffer unconditionally -- if the dcache wrote
back a line just before we invalidated it, the dirty data may be
sitting in the write buffer waiting to corrupt our buffer later.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-06-23 14:52:52 +02:00
..
cache.c [AVR32] Fix bug in invalidate_dcache_region() 2007-06-23 14:52:52 +02:00
clear_page.S [PATCH] avr32 architecture 2006-09-26 08:48:54 -07:00
copy_page.S [PATCH] avr32 architecture 2006-09-26 08:48:54 -07:00
dma-coherent.c [AVR32] Implement dma_{alloc,free}_writecombine() 2007-05-09 08:48:39 +02:00
fault.c [AVR32] ratelimit segfault reporting rate 2007-06-14 18:30:49 +02:00
init.c [AVR32] Move setup_bootmem() from mm/init.c to kernel/setup.c 2007-04-27 13:44:14 +02:00
ioremap.c [PATCH] AVR32: Don't try to iounmap P2 segment addresses 2006-10-25 20:26:33 -07:00
Makefile [PATCH] avr32 architecture 2006-09-26 08:48:54 -07:00
tlb.c [PATCH] mark struct file_operations const 2 2007-02-12 09:48:44 -08:00