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In current implementation, MIPS KVM uses IP2, IP3, IP4 and IP7 for external interrupt, two kinds of IPIs and timer interrupt respectively, but Loongson-3 based machines prefer to use IP2, IP3, IP6 and IP7 for two kinds of external interrupts, IPI and timer interrupt. So we define two priority-irq mapping tables: kvm_loongson3_priority_to_irq[] for Loongson-3, and kvm_default_priority_to_irq[] for others. The virtual interrupt infrastructure is updated to deliver all types of interrupts from IP2, IP3, IP4, IP6 and IP7. Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <1590220602-3547-10-git-send-email-chenhc@lemote.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
60 lines
2.1 KiB
C
60 lines
2.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* KVM/MIPS: Interrupts
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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* Authors: Sanjay Lal <sanjayl@kymasys.com>
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*/
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/*
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* MIPS Exception Priorities, exceptions (including interrupts) are queued up
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* for the guest in the order specified by their priorities
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*/
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#define MIPS_EXC_RESET 0
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#define MIPS_EXC_SRESET 1
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#define MIPS_EXC_DEBUG_ST 2
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#define MIPS_EXC_DEBUG 3
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#define MIPS_EXC_DDB 4
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#define MIPS_EXC_NMI 5
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#define MIPS_EXC_MCHK 6
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#define MIPS_EXC_INT_TIMER 7
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#define MIPS_EXC_INT_IO_1 8
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#define MIPS_EXC_INT_IO_2 9
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#define MIPS_EXC_EXECUTE 10
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#define MIPS_EXC_INT_IPI_1 11
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#define MIPS_EXC_INT_IPI_2 12
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#define MIPS_EXC_MAX 13
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/* XXXSL More to follow */
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#define C_TI (_ULCAST_(1) << 30)
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#ifdef CONFIG_KVM_MIPS_VZ
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#define KVM_MIPS_IRQ_DELIVER_ALL_AT_ONCE (1)
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#define KVM_MIPS_IRQ_CLEAR_ALL_AT_ONCE (1)
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#else
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#define KVM_MIPS_IRQ_DELIVER_ALL_AT_ONCE (0)
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#define KVM_MIPS_IRQ_CLEAR_ALL_AT_ONCE (0)
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#endif
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extern u32 *kvm_priority_to_irq;
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u32 kvm_irq_to_priority(u32 irq);
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void kvm_mips_queue_irq(struct kvm_vcpu *vcpu, unsigned int priority);
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void kvm_mips_dequeue_irq(struct kvm_vcpu *vcpu, unsigned int priority);
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int kvm_mips_pending_timer(struct kvm_vcpu *vcpu);
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void kvm_mips_queue_timer_int_cb(struct kvm_vcpu *vcpu);
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void kvm_mips_dequeue_timer_int_cb(struct kvm_vcpu *vcpu);
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void kvm_mips_queue_io_int_cb(struct kvm_vcpu *vcpu,
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struct kvm_mips_interrupt *irq);
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void kvm_mips_dequeue_io_int_cb(struct kvm_vcpu *vcpu,
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struct kvm_mips_interrupt *irq);
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int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority,
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u32 cause);
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int kvm_mips_irq_clear_cb(struct kvm_vcpu *vcpu, unsigned int priority,
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u32 cause);
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void kvm_mips_deliver_interrupts(struct kvm_vcpu *vcpu, u32 cause);
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