mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
793ae77469
They don't actually clobber memory, but gcc doesn't even know they _read_ memory, so can apparently re-order memory accesses around them. Which obviously does the wrong thing if the memory access happens to change the memory that the compare function is accessing.. Verified to fix a strange boot problem by Jens Axboe.
494 lines
11 KiB
C
494 lines
11 KiB
C
#ifndef _I386_STRING_H_
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#define _I386_STRING_H_
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#ifdef __KERNEL__
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#include <linux/config.h>
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/*
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* On a 486 or Pentium, we are better off not using the
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* byte string operations. But on a 386 or a PPro the
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* byte string ops are faster than doing it by hand
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* (MUCH faster on a Pentium).
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*/
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/*
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* This string-include defines all string functions as inline
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* functions. Use gcc. It also assumes ds=es=data space, this should be
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* normal. Most of the string-functions are rather heavily hand-optimized,
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* see especially strsep,strstr,str[c]spn. They should work, but are not
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* very easy to understand. Everything is done entirely within the register
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* set, making the functions fast and clean. String instructions have been
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* used through-out, making for "slightly" unclear code :-)
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*
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* NO Copyright (C) 1991, 1992 Linus Torvalds,
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* consider these trivial functions to be PD.
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*/
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/* AK: in fact I bet it would be better to move this stuff all out of line.
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*/
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#define __HAVE_ARCH_STRCPY
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static inline char * strcpy(char * dest,const char *src)
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{
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int d0, d1, d2;
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__asm__ __volatile__(
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"1:\tlodsb\n\t"
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"stosb\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b"
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: "=&S" (d0), "=&D" (d1), "=&a" (d2)
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:"0" (src),"1" (dest) : "memory");
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return dest;
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}
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#define __HAVE_ARCH_STRNCPY
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static inline char * strncpy(char * dest,const char *src,size_t count)
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{
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int d0, d1, d2, d3;
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__asm__ __volatile__(
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"1:\tdecl %2\n\t"
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"js 2f\n\t"
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"lodsb\n\t"
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"stosb\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b\n\t"
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"rep\n\t"
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"stosb\n"
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"2:"
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: "=&S" (d0), "=&D" (d1), "=&c" (d2), "=&a" (d3)
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:"0" (src),"1" (dest),"2" (count) : "memory");
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return dest;
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}
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#define __HAVE_ARCH_STRCAT
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static inline char * strcat(char * dest,const char * src)
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{
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int d0, d1, d2, d3;
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__asm__ __volatile__(
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"repne\n\t"
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"scasb\n\t"
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"decl %1\n"
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"1:\tlodsb\n\t"
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"stosb\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b"
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: "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3)
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: "0" (src), "1" (dest), "2" (0), "3" (0xffffffffu):"memory");
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return dest;
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}
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#define __HAVE_ARCH_STRNCAT
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static inline char * strncat(char * dest,const char * src,size_t count)
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{
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int d0, d1, d2, d3;
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__asm__ __volatile__(
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"repne\n\t"
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"scasb\n\t"
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"decl %1\n\t"
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"movl %8,%3\n"
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"1:\tdecl %3\n\t"
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"js 2f\n\t"
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"lodsb\n\t"
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"stosb\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b\n"
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"2:\txorl %2,%2\n\t"
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"stosb"
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: "=&S" (d0), "=&D" (d1), "=&a" (d2), "=&c" (d3)
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: "0" (src),"1" (dest),"2" (0),"3" (0xffffffffu), "g" (count)
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: "memory");
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return dest;
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}
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#define __HAVE_ARCH_STRCMP
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static inline int strcmp(const char * cs,const char * ct)
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{
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int d0, d1;
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register int __res;
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__asm__ __volatile__(
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"1:\tlodsb\n\t"
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"scasb\n\t"
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"jne 2f\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b\n\t"
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"xorl %%eax,%%eax\n\t"
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"jmp 3f\n"
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"2:\tsbbl %%eax,%%eax\n\t"
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"orb $1,%%al\n"
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"3:"
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:"=a" (__res), "=&S" (d0), "=&D" (d1)
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:"1" (cs),"2" (ct)
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:"memory");
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return __res;
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}
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#define __HAVE_ARCH_STRNCMP
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static inline int strncmp(const char * cs,const char * ct,size_t count)
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{
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register int __res;
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int d0, d1, d2;
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__asm__ __volatile__(
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"1:\tdecl %3\n\t"
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"js 2f\n\t"
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"lodsb\n\t"
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"scasb\n\t"
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"jne 3f\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b\n"
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"2:\txorl %%eax,%%eax\n\t"
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"jmp 4f\n"
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"3:\tsbbl %%eax,%%eax\n\t"
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"orb $1,%%al\n"
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"4:"
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:"=a" (__res), "=&S" (d0), "=&D" (d1), "=&c" (d2)
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:"1" (cs),"2" (ct),"3" (count)
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:"memory");
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return __res;
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}
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#define __HAVE_ARCH_STRCHR
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static inline char * strchr(const char * s, int c)
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{
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int d0;
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register char * __res;
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__asm__ __volatile__(
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"movb %%al,%%ah\n"
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"1:\tlodsb\n\t"
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"cmpb %%ah,%%al\n\t"
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"je 2f\n\t"
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"testb %%al,%%al\n\t"
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"jne 1b\n\t"
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"movl $1,%1\n"
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"2:\tmovl %1,%0\n\t"
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"decl %0"
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:"=a" (__res), "=&S" (d0)
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:"1" (s),"0" (c)
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:"memory");
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return __res;
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}
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#define __HAVE_ARCH_STRRCHR
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static inline char * strrchr(const char * s, int c)
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{
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int d0, d1;
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register char * __res;
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__asm__ __volatile__(
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"movb %%al,%%ah\n"
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"1:\tlodsb\n\t"
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"cmpb %%ah,%%al\n\t"
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"jne 2f\n\t"
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"leal -1(%%esi),%0\n"
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"2:\ttestb %%al,%%al\n\t"
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"jne 1b"
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:"=g" (__res), "=&S" (d0), "=&a" (d1)
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:"0" (0),"1" (s),"2" (c)
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:"memory");
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return __res;
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}
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#define __HAVE_ARCH_STRLEN
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static inline size_t strlen(const char * s)
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{
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int d0;
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register int __res;
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__asm__ __volatile__(
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"repne\n\t"
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"scasb\n\t"
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"notl %0\n\t"
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"decl %0"
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:"=c" (__res), "=&D" (d0)
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:"1" (s),"a" (0), "0" (0xffffffffu)
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:"memory");
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return __res;
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}
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static inline void * __memcpy(void * to, const void * from, size_t n)
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{
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int d0, d1, d2;
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__asm__ __volatile__(
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"rep ; movsl\n\t"
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"movl %4,%%ecx\n\t"
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"andl $3,%%ecx\n\t"
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#if 1 /* want to pay 2 byte penalty for a chance to skip microcoded rep? */
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"jz 1f\n\t"
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#endif
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"rep ; movsb\n\t"
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"1:"
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: "=&c" (d0), "=&D" (d1), "=&S" (d2)
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: "0" (n/4), "g" (n), "1" ((long) to), "2" ((long) from)
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: "memory");
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return (to);
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}
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/*
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* This looks ugly, but the compiler can optimize it totally,
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* as the count is constant.
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*/
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static inline void * __constant_memcpy(void * to, const void * from, size_t n)
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{
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long esi, edi;
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if (!n) return to;
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#if 1 /* want to do small copies with non-string ops? */
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switch (n) {
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case 1: *(char*)to = *(char*)from; return to;
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case 2: *(short*)to = *(short*)from; return to;
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case 4: *(int*)to = *(int*)from; return to;
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#if 1 /* including those doable with two moves? */
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case 3: *(short*)to = *(short*)from;
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*((char*)to+2) = *((char*)from+2); return to;
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case 5: *(int*)to = *(int*)from;
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*((char*)to+4) = *((char*)from+4); return to;
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case 6: *(int*)to = *(int*)from;
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*((short*)to+2) = *((short*)from+2); return to;
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case 8: *(int*)to = *(int*)from;
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*((int*)to+1) = *((int*)from+1); return to;
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#endif
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}
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#endif
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esi = (long) from;
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edi = (long) to;
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if (n >= 5*4) {
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/* large block: use rep prefix */
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int ecx;
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__asm__ __volatile__(
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"rep ; movsl"
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: "=&c" (ecx), "=&D" (edi), "=&S" (esi)
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: "0" (n/4), "1" (edi),"2" (esi)
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: "memory"
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);
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} else {
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/* small block: don't clobber ecx + smaller code */
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if (n >= 4*4) __asm__ __volatile__("movsl"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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if (n >= 3*4) __asm__ __volatile__("movsl"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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if (n >= 2*4) __asm__ __volatile__("movsl"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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if (n >= 1*4) __asm__ __volatile__("movsl"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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}
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switch (n % 4) {
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/* tail */
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case 0: return to;
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case 1: __asm__ __volatile__("movsb"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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return to;
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case 2: __asm__ __volatile__("movsw"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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return to;
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default: __asm__ __volatile__("movsw\n\tmovsb"
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:"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory");
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return to;
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}
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}
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#define __HAVE_ARCH_MEMCPY
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#ifdef CONFIG_X86_USE_3DNOW
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#include <asm/mmx.h>
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/*
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* This CPU favours 3DNow strongly (eg AMD Athlon)
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*/
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static inline void * __constant_memcpy3d(void * to, const void * from, size_t len)
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{
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if (len < 512)
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return __constant_memcpy(to, from, len);
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return _mmx_memcpy(to, from, len);
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}
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static __inline__ void *__memcpy3d(void *to, const void *from, size_t len)
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{
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if (len < 512)
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return __memcpy(to, from, len);
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return _mmx_memcpy(to, from, len);
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}
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#define memcpy(t, f, n) \
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(__builtin_constant_p(n) ? \
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__constant_memcpy3d((t),(f),(n)) : \
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__memcpy3d((t),(f),(n)))
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#else
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/*
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* No 3D Now!
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*/
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#define memcpy(t, f, n) \
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(__builtin_constant_p(n) ? \
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__constant_memcpy((t),(f),(n)) : \
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__memcpy((t),(f),(n)))
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#endif
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#define __HAVE_ARCH_MEMMOVE
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void *memmove(void * dest,const void * src, size_t n);
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#define memcmp __builtin_memcmp
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#define __HAVE_ARCH_MEMCHR
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static inline void * memchr(const void * cs,int c,size_t count)
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{
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int d0;
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register void * __res;
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if (!count)
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return NULL;
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__asm__ __volatile__(
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"repne\n\t"
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"scasb\n\t"
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"je 1f\n\t"
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"movl $1,%0\n"
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"1:\tdecl %0"
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:"=D" (__res), "=&c" (d0)
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:"a" (c),"0" (cs),"1" (count)
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:"memory");
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return __res;
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}
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static inline void * __memset_generic(void * s, char c,size_t count)
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{
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int d0, d1;
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__asm__ __volatile__(
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"rep\n\t"
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"stosb"
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: "=&c" (d0), "=&D" (d1)
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:"a" (c),"1" (s),"0" (count)
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:"memory");
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return s;
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}
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/* we might want to write optimized versions of these later */
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#define __constant_count_memset(s,c,count) __memset_generic((s),(c),(count))
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/*
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* memset(x,0,y) is a reasonably common thing to do, so we want to fill
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* things 32 bits at a time even when we don't know the size of the
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* area at compile-time..
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*/
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static inline void * __constant_c_memset(void * s, unsigned long c, size_t count)
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{
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int d0, d1;
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__asm__ __volatile__(
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"rep ; stosl\n\t"
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"testb $2,%b3\n\t"
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"je 1f\n\t"
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"stosw\n"
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"1:\ttestb $1,%b3\n\t"
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"je 2f\n\t"
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"stosb\n"
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"2:"
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:"=&c" (d0), "=&D" (d1)
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:"a" (c), "q" (count), "0" (count/4), "1" ((long) s)
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:"memory");
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return (s);
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}
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/* Added by Gertjan van Wingerde to make minix and sysv module work */
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#define __HAVE_ARCH_STRNLEN
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static inline size_t strnlen(const char * s, size_t count)
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{
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int d0;
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register int __res;
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__asm__ __volatile__(
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"movl %2,%0\n\t"
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"jmp 2f\n"
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"1:\tcmpb $0,(%0)\n\t"
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"je 3f\n\t"
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"incl %0\n"
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"2:\tdecl %1\n\t"
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"cmpl $-1,%1\n\t"
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"jne 1b\n"
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"3:\tsubl %2,%0"
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:"=a" (__res), "=&d" (d0)
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:"c" (s),"1" (count)
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:"memory");
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return __res;
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}
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/* end of additional stuff */
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#define __HAVE_ARCH_STRSTR
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extern char *strstr(const char *cs, const char *ct);
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/*
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* This looks horribly ugly, but the compiler can optimize it totally,
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* as we by now know that both pattern and count is constant..
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*/
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static inline void * __constant_c_and_count_memset(void * s, unsigned long pattern, size_t count)
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{
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switch (count) {
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case 0:
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return s;
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case 1:
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*(unsigned char *)s = pattern;
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return s;
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case 2:
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*(unsigned short *)s = pattern;
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return s;
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case 3:
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*(unsigned short *)s = pattern;
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*(2+(unsigned char *)s) = pattern;
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return s;
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case 4:
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*(unsigned long *)s = pattern;
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return s;
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}
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#define COMMON(x) \
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__asm__ __volatile__( \
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"rep ; stosl" \
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x \
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: "=&c" (d0), "=&D" (d1) \
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: "a" (pattern),"0" (count/4),"1" ((long) s) \
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: "memory")
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{
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int d0, d1;
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switch (count % 4) {
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case 0: COMMON(""); return s;
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case 1: COMMON("\n\tstosb"); return s;
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case 2: COMMON("\n\tstosw"); return s;
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default: COMMON("\n\tstosw\n\tstosb"); return s;
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}
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}
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#undef COMMON
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}
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#define __constant_c_x_memset(s, c, count) \
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(__builtin_constant_p(count) ? \
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__constant_c_and_count_memset((s),(c),(count)) : \
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__constant_c_memset((s),(c),(count)))
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#define __memset(s, c, count) \
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(__builtin_constant_p(count) ? \
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__constant_count_memset((s),(c),(count)) : \
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__memset_generic((s),(c),(count)))
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#define __HAVE_ARCH_MEMSET
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#define memset(s, c, count) \
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(__builtin_constant_p(c) ? \
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__constant_c_x_memset((s),(0x01010101UL*(unsigned char)(c)),(count)) : \
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__memset((s),(c),(count)))
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/*
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* find the first occurrence of byte 'c', or 1 past the area if none
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*/
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#define __HAVE_ARCH_MEMSCAN
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static inline void * memscan(void * addr, int c, size_t size)
|
|
{
|
|
if (!size)
|
|
return addr;
|
|
__asm__("repnz; scasb\n\t"
|
|
"jnz 1f\n\t"
|
|
"dec %%edi\n"
|
|
"1:"
|
|
: "=D" (addr), "=c" (size)
|
|
: "0" (addr), "1" (size), "a" (c)
|
|
: "memory");
|
|
return addr;
|
|
}
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif
|