Xiao Wang 9850e73e82 riscv: uaccess: Relax the threshold for fast path ... The bytes copy for unaligned head would cover at most SZREG-1 bytes, so it's better to set the threshold as >= (SZREG-1 + word_copy stride size) which equals to 9*SZREG-1. Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://lore.kernel.org/r/20240313091929.4029960-1-xiao.w.wang@intel.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-05-22 16:12:55 -07:00
..
clear_page.S	use linux/export.h rather than asm-generic/export.h	2024-01-09 20:10:40 -08:00
csum.c	RISC-V Patches for the 6.9 Merge Window	2024-03-22 10:41:13 -07:00
delay.c	include/linux/delay.h: replace kernel.h with the necessary inclusions	2021-11-09 10:02:49 -08:00
error-inject.c	riscv: Add support for function error injection	2021-01-14 15:09:09 -08:00
Makefile	Merge patch series "riscv: Add fine-tuned checksum functions"	2024-01-17 18:07:11 -08:00
memcpy.S	riscv: Use SYM_*() assembly macros instead of deprecated ones	2023-11-06 09:42:47 -08:00
memmove.S	riscv: Use SYM_*() assembly macros instead of deprecated ones	2023-11-06 09:42:47 -08:00
memset.S	riscv: Use SYM_*() assembly macros instead of deprecated ones	2023-11-06 09:42:47 -08:00
riscv_v_helpers.c	riscv: lib: vectorize copy_to_user/copy_from_user	2024-01-16 07:13:57 -08:00
strcmp.S	riscv: lib: Include hwcap.h directly	2023-03-14 20:51:24 -07:00
strlen.S	riscv: Allow to downgrade paging mode from the command line	2023-04-26 07:30:52 -07:00
strncmp.S	riscv: lib: Include hwcap.h directly	2023-03-14 20:51:24 -07:00
tishift.S	use linux/export.h rather than asm-generic/export.h	2024-01-09 20:10:40 -08:00
uaccess.S	riscv: uaccess: Relax the threshold for fast path	2024-05-22 16:12:55 -07:00
uaccess_vector.S	riscv: remove unneeded #include <asm-generic/export.h>	2024-01-21 16:36:29 -08:00
xor.S	riscv: Add vector extension XOR implementation	2024-01-16 07:13:55 -08:00