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https://github.com/torvalds/linux
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ef06f55a5c
None of these changes fix any actual bugs, but are just various cleanups that fell out along the way. In particular, some unused #defines and includes are removed, PREFETCH_STRIDE is added (the default is right for our shipping chips, but wrong for our next generation), our tile-specific prefetching code is removed so the (identical) generic prefetching code can be used instead, a comment is fixed to be proper GPL and not just a "paste GPL here" token, a "//" comment is converted to "/* */", etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_CACHE_H
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#define _ASM_TILE_CACHE_H
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#include <arch/chip.h>
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/* bytes per L1 data cache line */
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#define L1_CACHE_SHIFT CHIP_L1D_LOG_LINE_SIZE()
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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/* bytes per L2 cache line */
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#define L2_CACHE_SHIFT CHIP_L2_LOG_LINE_SIZE()
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#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
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#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)
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/*
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* TILE-Gx is fully coherents so we don't need to define
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* ARCH_KMALLOC_MINALIGN.
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*/
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#ifndef __tilegx__
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#define ARCH_KMALLOC_MINALIGN L2_CACHE_BYTES
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#endif
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/* use the cache line size for the L2, which is where it counts */
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#define SMP_CACHE_BYTES_SHIFT L2_CACHE_SHIFT
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#define SMP_CACHE_BYTES L2_CACHE_BYTES
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#define INTERNODE_CACHE_SHIFT L2_CACHE_SHIFT
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#define INTERNODE_CACHE_BYTES L2_CACHE_BYTES
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/* Group together read-mostly things to avoid cache false sharing */
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#define __read_mostly __attribute__((__section__(".data.read_mostly")))
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/*
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* Attribute for data that is kept read/write coherent until the end of
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* initialization, then bumped to read/only incoherent for performance.
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*/
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#define __write_once __attribute__((__section__(".w1data")))
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#endif /* _ASM_TILE_CACHE_H */
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