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d30492adea
dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJS5tJoAAoJEDqPOy9afJhJg2YP/1hZueLNwJwtasgSlrjPAKai +VDc1Sn0lB7p0D0r0cyd6kUPlAMBwZOMJ3wLvbI+z/yItCfXNxIDpaQszMoHmBox Dgj3BmnM0GJgtE124qKynFdDqJ09aHcJZ9iEXQAxwo3mWvmHW8U2P2nDQJbxz3Qm i/F7KzpXk6seUV7f14doPD0PY5CVRm0p5dfMXLsroLvWjrvTqA4imbAuOeHI1UuG siboNe94nLcAj8iBQanugpKjlKT4+jjeTCfCuJ2OeS5o2Lz3KO2BYr6HekbsNZiz atydhPO840fCNxR/SSKAgIzr9FjQ5Q2fJvF7m+6XyFND9gZ/yjN14LdlTU1SX3kD 1yB8OSqKjjLOBU5P1UwvD8NL8kldwoynYT7T4JqYIZQHZyjNGToBZ1SzUZ/yVsnE sMbfVC8X5RMEJzGIWNbm6kz+37CRQWNn4aPghGjkyLDGpyVf7dn+jlGBgGiahb8g io1Ir35/FykHAVx16veYD09sB+VYAeD23P/nuP7MbdCzYLmu4ibAiJyBiPQvcxmq YZWENS2j4NvG2XdHW07SpWC0U0mr5MLOkFjVkcW8h+aaT3FJUwaP0wjRyWoaF3Dt sEZ10OJLuXK5x3oiLFhuqHwGSGy+XoIq3FL00jjkib6uKcv2hNYQ+ZpPzG/CDbNx ndMT57cycXMYrOp8jklw =WRJD -----END PGP SIGNATURE----- Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux Pull more clock framework changes from Mike Turquette: "The second half of the clock framework pull requeust for 3.14 is dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request" [ Fix up stupid compile error in the source tree with evil merge - Grumpy Linus ] * tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux: (49 commits) clk: sort Makefile clk: sunxi: fix overflow when setting up divided factors clk: Export more clk-provider functions dt-bindings: qcom: Fix warning with duplicate dt define clk: si5351: remove variant from platform_data clk: samsung: Remove unneeded semicolon clk: qcom: Fix modular build ARM: OMAP3: use DT clock init if DT data is available ARM: AM33xx: remove old clock data and link in new clock init code ARM: AM43xx: Enable clock init ARM: OMAP: DRA7: Enable clock init ARM: OMAP4: remove old clock data and link in new clock init code ARM: OMAP2+: io: use new clock init API ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT ARM: OMAP3: hwmod: initialize clkdm from clkdm_name ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm ARM: OMAP2+: clock: use driver API instead of direct memory read/write ARM: OMAP2+: clock: add support for indexed memmaps ARM: dts: am43xx clock data ARM: dts: AM35xx: use DT clock data ...
676 lines
15 KiB
Plaintext
676 lines
15 KiB
Plaintext
/*
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* Device Tree Source for OMAP3 SoC
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/omap.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,omap3430", "ti,omap3";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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i2c2 = &i2c3;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0x0>;
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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reg = <0x54000000 0x800000>;
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interrupts = <3>;
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ti,hwmods = "debugss";
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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iva {
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compatible = "ti,iva2.2";
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ti,hwmods = "iva";
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dsp {
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compatible = "ti,omap3-c64";
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};
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};
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};
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/*
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* XXX: Use a flat representation of the OMAP3 interconnect.
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* The real OMAP interconnect network is quite complex.
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* Since that will not bring real advantage to represent that in DT for
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* the moment, just use a fake OCP bus entry to represent the whole bus
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* hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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reg = <0x68000000 0x10000>;
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interrupts = <9 10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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aes: aes@480c5000 {
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compatible = "ti,omap3-aes";
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ti,hwmods = "aes";
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reg = <0x480c5000 0x50>;
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interrupts = <0>;
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};
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prm: prm@48306000 {
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compatible = "ti,omap3-prm";
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reg = <0x48306000 0x4000>;
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prm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prm_clockdomains: clockdomains {
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};
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};
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cm: cm@48004000 {
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compatible = "ti,omap3-cm";
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reg = <0x48004000 0x4000>;
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cm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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cm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@48002000 {
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compatible = "ti,omap3-scrm";
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reg = <0x48002000 0x2000>;
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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counter32k: counter@48320000 {
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compatible = "ti,omap-counter32k";
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reg = <0x48320000 0x20>;
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ti,hwmods = "counter_32k";
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};
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intc: interrupt-controller@48200000 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,intc-size = <96>;
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reg = <0x48200000 0x1000>;
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};
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sdma: dma-controller@48056000 {
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compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
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reg = <0x48056000 0x1000>;
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interrupts = <12>,
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<13>,
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<14>,
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<15>;
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#dma-cells = <1>;
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#dma-channels = <32>;
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#dma-requests = <96>;
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};
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omap3_pmx_core: pinmux@48002030 {
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compatible = "ti,omap3-padconf", "pinctrl-single";
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reg = <0x48002030 0x0238>;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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omap3_pmx_wkup: pinmux@48002a00 {
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compatible = "ti,omap3-padconf", "pinctrl-single";
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reg = <0x48002a00 0x5c>;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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gpio1: gpio@48310000 {
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compatible = "ti,omap3-gpio";
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reg = <0x48310000 0x200>;
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interrupts = <29>;
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ti,hwmods = "gpio1";
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ti,gpio-always-on;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@49050000 {
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compatible = "ti,omap3-gpio";
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reg = <0x49050000 0x200>;
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interrupts = <30>;
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@49052000 {
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compatible = "ti,omap3-gpio";
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reg = <0x49052000 0x200>;
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interrupts = <31>;
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@49054000 {
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compatible = "ti,omap3-gpio";
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reg = <0x49054000 0x200>;
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interrupts = <32>;
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio5: gpio@49056000 {
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compatible = "ti,omap3-gpio";
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reg = <0x49056000 0x200>;
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interrupts = <33>;
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ti,hwmods = "gpio5";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@49058000 {
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compatible = "ti,omap3-gpio";
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reg = <0x49058000 0x200>;
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interrupts = <34>;
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ti,hwmods = "gpio6";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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uart1: serial@4806a000 {
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compatible = "ti,omap3-uart";
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reg = <0x4806a000 0x2000>;
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interrupts = <72>;
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dmas = <&sdma 49 &sdma 50>;
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dma-names = "tx", "rx";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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};
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uart2: serial@4806c000 {
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compatible = "ti,omap3-uart";
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reg = <0x4806c000 0x400>;
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interrupts = <73>;
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dmas = <&sdma 51 &sdma 52>;
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dma-names = "tx", "rx";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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};
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uart3: serial@49020000 {
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compatible = "ti,omap3-uart";
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reg = <0x49020000 0x400>;
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interrupts = <74>;
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dmas = <&sdma 53 &sdma 54>;
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dma-names = "tx", "rx";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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};
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i2c1: i2c@48070000 {
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compatible = "ti,omap3-i2c";
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reg = <0x48070000 0x80>;
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interrupts = <56>;
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dmas = <&sdma 27 &sdma 28>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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};
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i2c2: i2c@48072000 {
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compatible = "ti,omap3-i2c";
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reg = <0x48072000 0x80>;
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interrupts = <57>;
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dmas = <&sdma 29 &sdma 30>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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};
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i2c3: i2c@48060000 {
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compatible = "ti,omap3-i2c";
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reg = <0x48060000 0x80>;
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interrupts = <61>;
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dmas = <&sdma 25 &sdma 26>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c3";
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};
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mailbox: mailbox@48094000 {
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compatible = "ti,omap3-mailbox";
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ti,hwmods = "mailbox";
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reg = <0x48094000 0x200>;
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interrupts = <26>;
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};
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mcspi1: spi@48098000 {
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compatible = "ti,omap2-mcspi";
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reg = <0x48098000 0x100>;
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interrupts = <65>;
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "mcspi1";
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ti,spi-num-cs = <4>;
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dmas = <&sdma 35>,
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<&sdma 36>,
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<&sdma 37>,
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<&sdma 38>,
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<&sdma 39>,
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<&sdma 40>,
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<&sdma 41>,
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<&sdma 42>;
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dma-names = "tx0", "rx0", "tx1", "rx1",
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"tx2", "rx2", "tx3", "rx3";
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};
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mcspi2: spi@4809a000 {
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compatible = "ti,omap2-mcspi";
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reg = <0x4809a000 0x100>;
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interrupts = <66>;
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "mcspi2";
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ti,spi-num-cs = <2>;
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dmas = <&sdma 43>,
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<&sdma 44>,
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<&sdma 45>,
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<&sdma 46>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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mcspi3: spi@480b8000 {
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compatible = "ti,omap2-mcspi";
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reg = <0x480b8000 0x100>;
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interrupts = <91>;
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "mcspi3";
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ti,spi-num-cs = <2>;
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dmas = <&sdma 15>,
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<&sdma 16>,
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<&sdma 23>,
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<&sdma 24>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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mcspi4: spi@480ba000 {
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compatible = "ti,omap2-mcspi";
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reg = <0x480ba000 0x100>;
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interrupts = <48>;
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "mcspi4";
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ti,spi-num-cs = <1>;
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dmas = <&sdma 70>, <&sdma 71>;
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dma-names = "tx0", "rx0";
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};
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hdqw1w: 1w@480b2000 {
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compatible = "ti,omap3-1w";
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reg = <0x480b2000 0x1000>;
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interrupts = <58>;
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ti,hwmods = "hdq1w";
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};
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mmc1: mmc@4809c000 {
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compatible = "ti,omap3-hsmmc";
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reg = <0x4809c000 0x200>;
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interrupts = <83>;
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ti,hwmods = "mmc1";
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ti,dual-volt;
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dmas = <&sdma 61>, <&sdma 62>;
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dma-names = "tx", "rx";
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};
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mmc2: mmc@480b4000 {
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compatible = "ti,omap3-hsmmc";
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reg = <0x480b4000 0x200>;
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interrupts = <86>;
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ti,hwmods = "mmc2";
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dmas = <&sdma 47>, <&sdma 48>;
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dma-names = "tx", "rx";
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};
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mmc3: mmc@480ad000 {
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compatible = "ti,omap3-hsmmc";
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reg = <0x480ad000 0x200>;
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interrupts = <94>;
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ti,hwmods = "mmc3";
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dmas = <&sdma 77>, <&sdma 78>;
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dma-names = "tx", "rx";
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};
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mmu_isp: mmu@480bd400 {
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compatible = "ti,omap3-mmu-isp";
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ti,hwmods = "mmu_isp";
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reg = <0x480bd400 0x80>;
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interrupts = <8>;
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};
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wdt2: wdt@48314000 {
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compatible = "ti,omap3-wdt";
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reg = <0x48314000 0x80>;
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ti,hwmods = "wd_timer2";
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};
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mcbsp1: mcbsp@48074000 {
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compatible = "ti,omap3-mcbsp";
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reg = <0x48074000 0xff>;
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reg-names = "mpu";
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interrupts = <16>, /* OCP compliant interrupt */
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<59>, /* TX interrupt */
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<60>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp1";
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dmas = <&sdma 31>,
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<&sdma 32>;
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dma-names = "tx", "rx";
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};
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mcbsp2: mcbsp@49022000 {
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compatible = "ti,omap3-mcbsp";
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reg = <0x49022000 0xff>,
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<0x49028000 0xff>;
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reg-names = "mpu", "sidetone";
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interrupts = <17>, /* OCP compliant interrupt */
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<62>, /* TX interrupt */
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<63>, /* RX interrupt */
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<4>; /* Sidetone */
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interrupt-names = "common", "tx", "rx", "sidetone";
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ti,buffer-size = <1280>;
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ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
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dmas = <&sdma 33>,
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<&sdma 34>;
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dma-names = "tx", "rx";
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|
};
|
|
|
|
mcbsp3: mcbsp@49024000 {
|
|
compatible = "ti,omap3-mcbsp";
|
|
reg = <0x49024000 0xff>,
|
|
<0x4902a000 0xff>;
|
|
reg-names = "mpu", "sidetone";
|
|
interrupts = <22>, /* OCP compliant interrupt */
|
|
<89>, /* TX interrupt */
|
|
<90>, /* RX interrupt */
|
|
<5>; /* Sidetone */
|
|
interrupt-names = "common", "tx", "rx", "sidetone";
|
|
ti,buffer-size = <128>;
|
|
ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
|
|
dmas = <&sdma 17>,
|
|
<&sdma 18>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcbsp4: mcbsp@49026000 {
|
|
compatible = "ti,omap3-mcbsp";
|
|
reg = <0x49026000 0xff>;
|
|
reg-names = "mpu";
|
|
interrupts = <23>, /* OCP compliant interrupt */
|
|
<54>, /* TX interrupt */
|
|
<55>; /* RX interrupt */
|
|
interrupt-names = "common", "tx", "rx";
|
|
ti,buffer-size = <128>;
|
|
ti,hwmods = "mcbsp4";
|
|
dmas = <&sdma 19>,
|
|
<&sdma 20>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcbsp5: mcbsp@48096000 {
|
|
compatible = "ti,omap3-mcbsp";
|
|
reg = <0x48096000 0xff>;
|
|
reg-names = "mpu";
|
|
interrupts = <27>, /* OCP compliant interrupt */
|
|
<81>, /* TX interrupt */
|
|
<82>; /* RX interrupt */
|
|
interrupt-names = "common", "tx", "rx";
|
|
ti,buffer-size = <128>;
|
|
ti,hwmods = "mcbsp5";
|
|
dmas = <&sdma 21>,
|
|
<&sdma 22>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
sham: sham@480c3000 {
|
|
compatible = "ti,omap3-sham";
|
|
ti,hwmods = "sham";
|
|
reg = <0x480c3000 0x64>;
|
|
interrupts = <49>;
|
|
};
|
|
|
|
smartreflex_core: smartreflex@480cb000 {
|
|
compatible = "ti,omap3-smartreflex-core";
|
|
ti,hwmods = "smartreflex_core";
|
|
reg = <0x480cb000 0x400>;
|
|
interrupts = <19>;
|
|
};
|
|
|
|
smartreflex_mpu_iva: smartreflex@480c9000 {
|
|
compatible = "ti,omap3-smartreflex-iva";
|
|
ti,hwmods = "smartreflex_mpu_iva";
|
|
reg = <0x480c9000 0x400>;
|
|
interrupts = <18>;
|
|
};
|
|
|
|
timer1: timer@48318000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x48318000 0x400>;
|
|
interrupts = <37>;
|
|
ti,hwmods = "timer1";
|
|
ti,timer-alwon;
|
|
};
|
|
|
|
timer2: timer@49032000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x49032000 0x400>;
|
|
interrupts = <38>;
|
|
ti,hwmods = "timer2";
|
|
};
|
|
|
|
timer3: timer@49034000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x49034000 0x400>;
|
|
interrupts = <39>;
|
|
ti,hwmods = "timer3";
|
|
};
|
|
|
|
timer4: timer@49036000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x49036000 0x400>;
|
|
interrupts = <40>;
|
|
ti,hwmods = "timer4";
|
|
};
|
|
|
|
timer5: timer@49038000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x49038000 0x400>;
|
|
interrupts = <41>;
|
|
ti,hwmods = "timer5";
|
|
ti,timer-dsp;
|
|
};
|
|
|
|
timer6: timer@4903a000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x4903a000 0x400>;
|
|
interrupts = <42>;
|
|
ti,hwmods = "timer6";
|
|
ti,timer-dsp;
|
|
};
|
|
|
|
timer7: timer@4903c000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x4903c000 0x400>;
|
|
interrupts = <43>;
|
|
ti,hwmods = "timer7";
|
|
ti,timer-dsp;
|
|
};
|
|
|
|
timer8: timer@4903e000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x4903e000 0x400>;
|
|
interrupts = <44>;
|
|
ti,hwmods = "timer8";
|
|
ti,timer-pwm;
|
|
ti,timer-dsp;
|
|
};
|
|
|
|
timer9: timer@49040000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x49040000 0x400>;
|
|
interrupts = <45>;
|
|
ti,hwmods = "timer9";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer10: timer@48086000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x48086000 0x400>;
|
|
interrupts = <46>;
|
|
ti,hwmods = "timer10";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer11: timer@48088000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x48088000 0x400>;
|
|
interrupts = <47>;
|
|
ti,hwmods = "timer11";
|
|
ti,timer-pwm;
|
|
};
|
|
|
|
timer12: timer@48304000 {
|
|
compatible = "ti,omap3430-timer";
|
|
reg = <0x48304000 0x400>;
|
|
interrupts = <95>;
|
|
ti,hwmods = "timer12";
|
|
ti,timer-alwon;
|
|
ti,timer-secure;
|
|
};
|
|
|
|
usbhstll: usbhstll@48062000 {
|
|
compatible = "ti,usbhs-tll";
|
|
reg = <0x48062000 0x1000>;
|
|
interrupts = <78>;
|
|
ti,hwmods = "usb_tll_hs";
|
|
};
|
|
|
|
usbhshost: usbhshost@48064000 {
|
|
compatible = "ti,usbhs-host";
|
|
reg = <0x48064000 0x400>;
|
|
ti,hwmods = "usb_host_hs";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
usbhsohci: ohci@48064400 {
|
|
compatible = "ti,ohci-omap3", "usb-ohci";
|
|
reg = <0x48064400 0x400>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <76>;
|
|
};
|
|
|
|
usbhsehci: ehci@48064800 {
|
|
compatible = "ti,ehci-omap", "usb-ehci";
|
|
reg = <0x48064800 0x400>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <77>;
|
|
};
|
|
};
|
|
|
|
gpmc: gpmc@6e000000 {
|
|
compatible = "ti,omap3430-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
reg = <0x6e000000 0x02d0>;
|
|
interrupts = <20>;
|
|
gpmc,num-cs = <8>;
|
|
gpmc,num-waitpins = <4>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
};
|
|
|
|
usb_otg_hs: usb_otg_hs@480ab000 {
|
|
compatible = "ti,omap3-musb";
|
|
reg = <0x480ab000 0x1000>;
|
|
interrupts = <92>, <93>;
|
|
interrupt-names = "mc", "dma";
|
|
ti,hwmods = "usb_otg_hs";
|
|
multipoint = <1>;
|
|
num-eps = <16>;
|
|
ram-bits = <12>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/include/ "omap3xxx-clocks.dtsi"
|