linux/tools/perf/util/intel-pt-decoder
Adrian Hunter 78173ec631 x86/insn: perf tools: Pedantically tweak opcode map for MPX instructions
The MPX instructions are presently not described in the SDM
opcode maps, and there are not encoding characters for bnd
registers, address method or operand type.  So the kernel
opcode map is using 'Gv' for bnd registers and 'Ev' for
everything else.  That is fine because the instruction
decoder does not use that information anyway, except as
an indication that there is a ModR/M byte.

Nevertheless, in some cases the 'Gv' and 'Ev' are the wrong
way around, BNDLDX and BNDSTX have 2 operands not 3, and it
wouldn't hurt to identify the mandatory prefixes.

This has no effect on the decoding of valid instructions,
but the addition of the mandatory prefixes will cause some
invalid instructions to error out that wouldn't have
previously.

Note that perf tools has a copy of the instruction decoder
and provides a test for new instructions which includes MPX
instructions e.g.

  $ perf test "x86 ins"
  39: Test x86 instruction decoder - new instructions          : Ok

Or to see the details:

  $ perf test -v "x86 ins"

Commiter notes:

And to see these MPX instructions specifically:

  $ perf test -v "x86 ins" 2>&1 | grep bndldx | head -3
  Decoded ok: 0f 1a 00             	bndldx (%eax),%bnd0
  Decoded ok: 0f 1a 05 78 56 34 12 	bndldx 0x12345678,%bnd0
  Decoded ok: 0f 1a 18             	bndldx (%eax),%bnd3
  $ perf test -v "x86 ins" 2>&1 | grep bndstx | head -3
  Decoded ok: 0f 1b 00             	bndstx %bnd0,(%eax)
  Decoded ok: 0f 1b 05 78 56 34 12 	bndstx %bnd0,0x12345678
  Decoded ok: 0f 1b 18             	bndstx %bnd3,(%eax)
  $

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1441196131-20632-4-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2015-09-04 12:01:02 -03:00
..
Build perf tools: Display build warning if x86 instruction decoder differs from kernel 2015-09-04 12:01:01 -03:00
gen-insn-attr-x86.awk perf tools: Add Intel PT instruction decoder 2015-08-17 11:11:36 -03:00
inat.c perf tools: Fix tarball build broken by pt/bts 2015-08-22 12:27:07 -03:00
inat.h perf tools: Fix tarball build broken by pt/bts 2015-08-22 12:27:07 -03:00
inat_types.h perf tools: Fix tarball build broken by pt/bts 2015-08-22 12:27:07 -03:00
insn.c perf tools: Fix tarball build broken by pt/bts 2015-08-22 12:27:07 -03:00
insn.h perf tools: Fix tarball build broken by pt/bts 2015-08-22 12:27:07 -03:00
intel-pt-decoder.c perf tools: Add Intel PT support for decoding TRACESTOP packets 2015-08-24 17:50:23 -03:00
intel-pt-decoder.h perf tools: Add Intel PT support for decoding MTC packets 2015-08-24 17:46:56 -03:00
intel-pt-insn-decoder.c perf tools: Fix build on powerpc broken by pt/bts 2015-08-31 15:47:33 -03:00
intel-pt-insn-decoder.h perf tools: Add Intel PT instruction decoder 2015-08-17 11:11:36 -03:00
intel-pt-log.c perf tools: Add Intel PT log 2015-08-17 11:11:36 -03:00
intel-pt-log.h perf tools: Add Intel PT log 2015-08-17 11:11:36 -03:00
intel-pt-pkt-decoder.c perf tools: Add new Intel PT packet definitions 2015-08-24 17:46:06 -03:00
intel-pt-pkt-decoder.h perf tools: Add new Intel PT packet definitions 2015-08-24 17:46:06 -03:00
x86-opcode-map.txt x86/insn: perf tools: Pedantically tweak opcode map for MPX instructions 2015-09-04 12:01:02 -03:00