mirror of
https://github.com/torvalds/linux
synced 2024-09-28 23:41:21 +00:00
b1220e2e7f
Fixed a bug where two interfaces using pins in the same pin group could not be allocated at the same time even if there where no pin collisions. Change all restore and returns into goto exit pattern. Also, remove useless CVS id and correct chapter reference for ETRAX100LX Designer's Reference in comment.
1182 lines
24 KiB
C
1182 lines
24 KiB
C
/* IO interface mux allocator for ETRAX100LX.
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* Copyright 2004-2007, Axis Communications AB
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*/
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/* C.f. ETRAX100LX Designer's Reference chapter 19.9 */
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <asm/arch/svinto.h>
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#include <asm/io.h>
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#include <asm/arch/io_interface_mux.h>
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#define DBG(s)
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/* Macro to access ETRAX 100 registers */
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#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
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IO_STATE_(reg##_, field##_, _##val)
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enum io_if_group {
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group_a = (1<<0),
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group_b = (1<<1),
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group_c = (1<<2),
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group_d = (1<<3),
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group_e = (1<<4),
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group_f = (1<<5)
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};
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struct watcher
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{
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void (*notify)(const unsigned int gpio_in_available,
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const unsigned int gpio_out_available,
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const unsigned char pa_available,
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const unsigned char pb_available);
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struct watcher *next;
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};
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struct if_group
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{
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enum io_if_group group;
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/* name - the name of the group 'A' to 'F' */
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char *name;
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/* used - a bit mask of all pins in the group in the order listed
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* in the tables in 19.9.1 to 19.9.6. Note that no
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* distinction is made between in, out and in/out pins. */
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unsigned int used;
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};
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struct interface
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{
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enum cris_io_interface ioif;
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/* name - the name of the interface */
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char *name;
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/* groups - OR'ed together io_if_group flags describing what pin groups
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* the interface uses pins in. */
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unsigned char groups;
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/* used - set when the interface is allocated. */
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unsigned char used;
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char *owner;
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/* group_a through group_f - bit masks describing what pins in the
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* pin groups the interface uses. */
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unsigned int group_a;
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unsigned int group_b;
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unsigned int group_c;
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unsigned int group_d;
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unsigned int group_e;
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unsigned int group_f;
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/* gpio_g_in, gpio_g_out, gpio_b - bit masks telling what pins in the
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* GPIO ports the interface uses. This could be reconstucted using
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* the group_X masks and a table of what pins the GPIO ports use,
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* but that would be messy. */
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unsigned int gpio_g_in;
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unsigned int gpio_g_out;
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unsigned char gpio_b;
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};
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static struct if_group if_groups[6] = {
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{
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.group = group_a,
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.name = "A",
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.used = 0,
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},
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{
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.group = group_b,
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.name = "B",
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.used = 0,
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},
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{
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.group = group_c,
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.name = "C",
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.used = 0,
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},
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{
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.group = group_d,
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.name = "D",
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.used = 0,
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},
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{
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.group = group_e,
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.name = "E",
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.used = 0,
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},
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{
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.group = group_f,
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.name = "F",
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.used = 0,
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}
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};
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/* The order in the array must match the order of enum
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* cris_io_interface in io_interface_mux.h */
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static struct interface interfaces[] = {
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/* Begin Non-multiplexed interfaces */
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{
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.ioif = if_eth,
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.name = "ethernet",
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.groups = 0,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0,
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.gpio_g_out = 0,
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.gpio_b = 0
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},
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{
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.ioif = if_serial_0,
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.name = "serial_0",
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.groups = 0,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0,
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.gpio_g_out = 0,
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.gpio_b = 0
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},
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/* End Non-multiplexed interfaces */
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{
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.ioif = if_serial_1,
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.name = "serial_1",
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.groups = group_e,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0x0f,
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.group_f = 0,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_serial_2,
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.name = "serial_2",
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.groups = group_b,
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.group_a = 0,
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.group_b = 0x0f,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x000000c0,
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.gpio_g_out = 0x000000c0,
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.gpio_b = 0x00
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},
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{
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.ioif = if_serial_3,
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.name = "serial_3",
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.groups = group_c,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0x0f,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0xc0000000,
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.gpio_g_out = 0xc0000000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_sync_serial_1,
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.name = "sync_serial_1",
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.groups = group_e | group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0x0f,
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.group_f = 0x10,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0x10
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},
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{
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.ioif = if_sync_serial_3,
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.name = "sync_serial_3",
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.groups = group_c | group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0x0f,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0x80,
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.gpio_g_in = 0xc0000000,
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.gpio_g_out = 0xc0000000,
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.gpio_b = 0x80
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},
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{
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.ioif = if_shared_ram,
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.name = "shared_ram",
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.groups = group_a,
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.group_a = 0x7f8ff,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x0000ff3e,
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.gpio_g_out = 0x0000ff38,
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.gpio_b = 0x00
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},
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{
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.ioif = if_shared_ram_w,
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.name = "shared_ram_w",
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.groups = group_a | group_d,
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.group_a = 0x7f8ff,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0xff,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x00ffff3e,
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.gpio_g_out = 0x00ffff38,
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.gpio_b = 0x00
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},
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{
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.ioif = if_par_0,
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.name = "par_0",
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.groups = group_a,
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.group_a = 0x7fbff,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x0000ff3e,
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.gpio_g_out = 0x0000ff3e,
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.gpio_b = 0x00
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},
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{
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.ioif = if_par_1,
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.name = "par_1",
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.groups = group_d,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0x7feff,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x3eff0000,
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.gpio_g_out = 0x3eff0000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_par_w,
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.name = "par_w",
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.groups = group_a | group_d,
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.group_a = 0x7fbff,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0xff,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x00ffff3e,
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.gpio_g_out = 0x00ffff3e,
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.gpio_b = 0x00
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},
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{
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.ioif = if_scsi8_0,
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.name = "scsi8_0",
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.groups = group_a | group_b | group_f,
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.group_a = 0x7ffff,
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.group_b = 0x0f,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0x10,
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.gpio_g_in = 0x0000ffff,
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.gpio_g_out = 0x0000ffff,
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.gpio_b = 0x10
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},
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{
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.ioif = if_scsi8_1,
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.name = "scsi8_1",
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.groups = group_c | group_d | group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0x0f,
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.group_d = 0x7ffff,
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.group_e = 0,
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.group_f = 0x80,
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.gpio_g_in = 0xffff0000,
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.gpio_g_out = 0xffff0000,
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.gpio_b = 0x80
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},
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{
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.ioif = if_scsi_w,
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.name = "scsi_w",
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.groups = group_a | group_b | group_d | group_f,
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.group_a = 0x7ffff,
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.group_b = 0x0f,
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.group_c = 0,
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.group_d = 0x601ff,
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.group_e = 0,
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.group_f = 0x90,
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.gpio_g_in = 0x01ffffff,
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.gpio_g_out = 0x07ffffff,
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.gpio_b = 0x80
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},
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{
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.ioif = if_ata,
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.name = "ata",
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.groups = group_a | group_b | group_c | group_d,
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.group_a = 0x7ffff,
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.group_b = 0x0f,
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.group_c = 0x0f,
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.group_d = 0x7cfff,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0xf9ffffff,
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.gpio_g_out = 0xffffffff,
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.gpio_b = 0x80
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},
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{
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.ioif = if_csp,
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.name = "csp",
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.groups = group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0xfc,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0xfc
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},
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{
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.ioif = if_i2c,
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.name = "i2c",
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.groups = group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0x03,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0x03
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},
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{
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.ioif = if_usb_1,
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.name = "usb_1",
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.groups = group_e | group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0x0f,
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.group_f = 0x2c,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0x2c
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},
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{
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.ioif = if_usb_2,
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.name = "usb_2",
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.groups = group_d,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0x33e00,
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.group_f = 0,
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.gpio_g_in = 0x3e000000,
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.gpio_g_out = 0x0c000000,
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.gpio_b = 0x00
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},
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/* GPIO pins */
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{
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.ioif = if_gpio_grp_a,
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.name = "gpio_a",
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.groups = group_a,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x0000ff3f,
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.gpio_g_out = 0x0000ff3f,
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.gpio_b = 0x00
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},
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{
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.ioif = if_gpio_grp_b,
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.name = "gpio_b",
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.groups = group_b,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x000000c0,
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.gpio_g_out = 0x000000c0,
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.gpio_b = 0x00
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},
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{
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.ioif = if_gpio_grp_c,
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.name = "gpio_c",
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.groups = group_c,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0xc0000000,
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.gpio_g_out = 0xc0000000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_gpio_grp_d,
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.name = "gpio_d",
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.groups = group_d,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x3fff0000,
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.gpio_g_out = 0x3fff0000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_gpio_grp_e,
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.name = "gpio_e",
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.groups = group_e,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0x00
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},
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{
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.ioif = if_gpio_grp_f,
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.name = "gpio_f",
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.groups = group_f,
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.group_a = 0,
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.group_b = 0,
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.group_c = 0,
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.group_d = 0,
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.group_e = 0,
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.group_f = 0,
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.gpio_g_in = 0x00000000,
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.gpio_g_out = 0x00000000,
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.gpio_b = 0xff
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}
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/* Array end */
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};
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|
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static struct watcher *watchers = NULL;
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|
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/* The pins that are free to use in the GPIO ports. */
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static unsigned int gpio_in_pins = 0xffffffff;
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static unsigned int gpio_out_pins = 0xffffffff;
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static unsigned char gpio_pb_pins = 0xff;
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static unsigned char gpio_pa_pins = 0xff;
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|
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/* Identifiers for the owners of the GPIO pins. */
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static enum cris_io_interface gpio_pa_owners[8];
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static enum cris_io_interface gpio_pb_owners[8];
|
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static enum cris_io_interface gpio_pg_owners[32];
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|
|
static int cris_io_interface_init(void);
|
|
|
|
static unsigned char clear_group_from_set(const unsigned char groups, struct if_group *group)
|
|
{
|
|
return (groups & ~group->group);
|
|
}
|
|
|
|
|
|
static struct if_group *get_group(const unsigned char groups)
|
|
{
|
|
int i;
|
|
for (i = 0; i < ARRAY_SIZE(if_groups); i++) {
|
|
if (groups & if_groups[i].group) {
|
|
return &if_groups[i];
|
|
}
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
|
|
static void notify_watchers(void)
|
|
{
|
|
struct watcher *w = watchers;
|
|
|
|
DBG(printk("io_interface_mux: notifying watchers\n"));
|
|
|
|
while (NULL != w) {
|
|
w->notify((const unsigned int)gpio_in_pins,
|
|
(const unsigned int)gpio_out_pins,
|
|
(const unsigned char)gpio_pa_pins,
|
|
(const unsigned char)gpio_pb_pins);
|
|
w = w->next;
|
|
}
|
|
}
|
|
|
|
|
|
int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id)
|
|
{
|
|
int set_gen_config = 0;
|
|
int set_gen_config_ii = 0;
|
|
unsigned long int gens;
|
|
unsigned long int gens_ii;
|
|
struct if_group *grp;
|
|
unsigned char group_set;
|
|
unsigned long flags;
|
|
int res = 0;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
DBG(printk("cris_request_io_interface(%d, \"%s\")\n", ioif, device_id));
|
|
|
|
if ((ioif >= if_max_interfaces) || (ioif < 0)) {
|
|
printk(KERN_CRIT "cris_request_io_interface: Bad interface "
|
|
"%u submitted for %s\n",
|
|
ioif,
|
|
device_id);
|
|
return -EINVAL;
|
|
}
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (interfaces[ioif].used) {
|
|
printk(KERN_CRIT "cris_io_interface: Cannot allocate interface "
|
|
"%s for %s, in use by %s\n",
|
|
interfaces[ioif].name,
|
|
device_id,
|
|
interfaces[ioif].owner);
|
|
res = -EBUSY;
|
|
goto exit;
|
|
}
|
|
|
|
/* Check that all required pins in the used groups are free
|
|
* before allocating. */
|
|
group_set = interfaces[ioif].groups;
|
|
while (NULL != (grp = get_group(group_set))) {
|
|
unsigned int if_group_use = 0;
|
|
|
|
switch (grp->group) {
|
|
case group_a:
|
|
if_group_use = interfaces[ioif].group_a;
|
|
break;
|
|
case group_b:
|
|
if_group_use = interfaces[ioif].group_b;
|
|
break;
|
|
case group_c:
|
|
if_group_use = interfaces[ioif].group_c;
|
|
break;
|
|
case group_d:
|
|
if_group_use = interfaces[ioif].group_d;
|
|
break;
|
|
case group_e:
|
|
if_group_use = interfaces[ioif].group_e;
|
|
break;
|
|
case group_f:
|
|
if_group_use = interfaces[ioif].group_f;
|
|
break;
|
|
default:
|
|
BUG_ON(1);
|
|
}
|
|
|
|
if (if_group_use & grp->used) {
|
|
printk(KERN_INFO "cris_request_io_interface: group "
|
|
"%s needed by %s not available\n",
|
|
grp->name, interfaces[ioif].name);
|
|
res = -EBUSY;
|
|
goto exit;
|
|
}
|
|
|
|
group_set = clear_group_from_set(group_set, grp);
|
|
}
|
|
|
|
/* Are the required GPIO pins available too? */
|
|
if (((interfaces[ioif].gpio_g_in & gpio_in_pins) !=
|
|
interfaces[ioif].gpio_g_in) ||
|
|
((interfaces[ioif].gpio_g_out & gpio_out_pins) !=
|
|
interfaces[ioif].gpio_g_out) ||
|
|
((interfaces[ioif].gpio_b & gpio_pb_pins) !=
|
|
interfaces[ioif].gpio_b)) {
|
|
printk(KERN_CRIT "cris_request_io_interface: Could not get "
|
|
"required pins for interface %u\n", ioif);
|
|
res = -EBUSY;
|
|
goto exit;
|
|
}
|
|
|
|
/* Check which registers need to be reconfigured. */
|
|
gens = genconfig_shadow;
|
|
gens_ii = gen_config_ii_shadow;
|
|
|
|
set_gen_config = 1;
|
|
switch (ioif)
|
|
{
|
|
/* Begin Non-multiplexed interfaces */
|
|
case if_eth:
|
|
/* fall through */
|
|
case if_serial_0:
|
|
set_gen_config = 0;
|
|
break;
|
|
/* End Non-multiplexed interfaces */
|
|
case if_serial_1:
|
|
set_gen_config_ii = 1;
|
|
SETS(gens_ii, R_GEN_CONFIG_II, sermode1, async);
|
|
break;
|
|
case if_serial_2:
|
|
SETS(gens, R_GEN_CONFIG, ser2, select);
|
|
break;
|
|
case if_serial_3:
|
|
SETS(gens, R_GEN_CONFIG, ser3, select);
|
|
set_gen_config_ii = 1;
|
|
SETS(gens_ii, R_GEN_CONFIG_II, sermode3, async);
|
|
break;
|
|
case if_sync_serial_1:
|
|
set_gen_config_ii = 1;
|
|
SETS(gens_ii, R_GEN_CONFIG_II, sermode1, sync);
|
|
break;
|
|
case if_sync_serial_3:
|
|
SETS(gens, R_GEN_CONFIG, ser3, select);
|
|
set_gen_config_ii = 1;
|
|
SETS(gens_ii, R_GEN_CONFIG_II, sermode3, sync);
|
|
break;
|
|
case if_shared_ram:
|
|
SETS(gens, R_GEN_CONFIG, mio, select);
|
|
break;
|
|
case if_shared_ram_w:
|
|
SETS(gens, R_GEN_CONFIG, mio_w, select);
|
|
break;
|
|
case if_par_0:
|
|
SETS(gens, R_GEN_CONFIG, par0, select);
|
|
break;
|
|
case if_par_1:
|
|
SETS(gens, R_GEN_CONFIG, par1, select);
|
|
break;
|
|
case if_par_w:
|
|
SETS(gens, R_GEN_CONFIG, par0, select);
|
|
SETS(gens, R_GEN_CONFIG, par_w, select);
|
|
break;
|
|
case if_scsi8_0:
|
|
SETS(gens, R_GEN_CONFIG, scsi0, select);
|
|
break;
|
|
case if_scsi8_1:
|
|
SETS(gens, R_GEN_CONFIG, scsi1, select);
|
|
break;
|
|
case if_scsi_w:
|
|
SETS(gens, R_GEN_CONFIG, scsi0, select);
|
|
SETS(gens, R_GEN_CONFIG, scsi0w, select);
|
|
break;
|
|
case if_ata:
|
|
SETS(gens, R_GEN_CONFIG, ata, select);
|
|
break;
|
|
case if_csp:
|
|
/* fall through */
|
|
case if_i2c:
|
|
set_gen_config = 0;
|
|
break;
|
|
case if_usb_1:
|
|
SETS(gens, R_GEN_CONFIG, usb1, select);
|
|
break;
|
|
case if_usb_2:
|
|
SETS(gens, R_GEN_CONFIG, usb2, select);
|
|
break;
|
|
case if_gpio_grp_a:
|
|
/* GPIO groups are only accounted, don't do configuration changes. */
|
|
/* fall through */
|
|
case if_gpio_grp_b:
|
|
/* fall through */
|
|
case if_gpio_grp_c:
|
|
/* fall through */
|
|
case if_gpio_grp_d:
|
|
/* fall through */
|
|
case if_gpio_grp_e:
|
|
/* fall through */
|
|
case if_gpio_grp_f:
|
|
set_gen_config = 0;
|
|
break;
|
|
default:
|
|
printk(KERN_INFO "cris_request_io_interface: Bad interface "
|
|
"%u submitted for %s\n",
|
|
ioif, device_id);
|
|
res = -EBUSY;
|
|
goto exit;
|
|
}
|
|
|
|
/* All needed I/O pins and pin groups are free, allocate. */
|
|
group_set = interfaces[ioif].groups;
|
|
while (NULL != (grp = get_group(group_set))) {
|
|
unsigned int if_group_use = 0;
|
|
|
|
switch (grp->group) {
|
|
case group_a:
|
|
if_group_use = interfaces[ioif].group_a;
|
|
break;
|
|
case group_b:
|
|
if_group_use = interfaces[ioif].group_b;
|
|
break;
|
|
case group_c:
|
|
if_group_use = interfaces[ioif].group_c;
|
|
break;
|
|
case group_d:
|
|
if_group_use = interfaces[ioif].group_d;
|
|
break;
|
|
case group_e:
|
|
if_group_use = interfaces[ioif].group_e;
|
|
break;
|
|
case group_f:
|
|
if_group_use = interfaces[ioif].group_f;
|
|
break;
|
|
default:
|
|
BUG_ON(1);
|
|
}
|
|
grp->used |= if_group_use;
|
|
|
|
group_set = clear_group_from_set(group_set, grp);
|
|
}
|
|
|
|
interfaces[ioif].used = 1;
|
|
interfaces[ioif].owner = (char*)device_id;
|
|
|
|
if (set_gen_config) {
|
|
volatile int i;
|
|
genconfig_shadow = gens;
|
|
*R_GEN_CONFIG = genconfig_shadow;
|
|
/* Wait 12 cycles before doing any DMA command */
|
|
for(i = 6; i > 0; i--)
|
|
nop();
|
|
}
|
|
if (set_gen_config_ii) {
|
|
gen_config_ii_shadow = gens_ii;
|
|
*R_GEN_CONFIG_II = gen_config_ii_shadow;
|
|
}
|
|
|
|
DBG(printk(KERN_DEBUG "GPIO pins: available before: "
|
|
"g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
gpio_in_pins, gpio_out_pins, gpio_pb_pins));
|
|
DBG(printk(KERN_DEBUG
|
|
"grabbing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
interfaces[ioif].gpio_g_in,
|
|
interfaces[ioif].gpio_g_out,
|
|
interfaces[ioif].gpio_b));
|
|
|
|
gpio_in_pins &= ~interfaces[ioif].gpio_g_in;
|
|
gpio_out_pins &= ~interfaces[ioif].gpio_g_out;
|
|
gpio_pb_pins &= ~interfaces[ioif].gpio_b;
|
|
|
|
DBG(printk(KERN_DEBUG "GPIO pins: available after: "
|
|
"g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
gpio_in_pins, gpio_out_pins, gpio_pb_pins));
|
|
|
|
exit:
|
|
local_irq_restore(flags);
|
|
if (res == 0)
|
|
notify_watchers();
|
|
return res;
|
|
}
|
|
|
|
|
|
void cris_free_io_interface(enum cris_io_interface ioif)
|
|
{
|
|
struct if_group *grp;
|
|
unsigned char group_set;
|
|
unsigned long flags;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
if ((ioif >= if_max_interfaces) || (ioif < 0)) {
|
|
printk(KERN_CRIT "cris_free_io_interface: Bad interface %u\n",
|
|
ioif);
|
|
return;
|
|
}
|
|
local_irq_save(flags);
|
|
if (!interfaces[ioif].used) {
|
|
printk(KERN_CRIT "cris_free_io_interface: Freeing free interface %u\n",
|
|
ioif);
|
|
local_irq_restore(flags);
|
|
return;
|
|
}
|
|
group_set = interfaces[ioif].groups;
|
|
while (NULL != (grp = get_group(group_set))) {
|
|
unsigned int if_group_use = 0;
|
|
|
|
switch (grp->group) {
|
|
case group_a:
|
|
if_group_use = interfaces[ioif].group_a;
|
|
break;
|
|
case group_b:
|
|
if_group_use = interfaces[ioif].group_b;
|
|
break;
|
|
case group_c:
|
|
if_group_use = interfaces[ioif].group_c;
|
|
break;
|
|
case group_d:
|
|
if_group_use = interfaces[ioif].group_d;
|
|
break;
|
|
case group_e:
|
|
if_group_use = interfaces[ioif].group_e;
|
|
break;
|
|
case group_f:
|
|
if_group_use = interfaces[ioif].group_f;
|
|
break;
|
|
default:
|
|
BUG_ON(1);
|
|
}
|
|
|
|
if ((grp->used & if_group_use) != if_group_use)
|
|
BUG_ON(1);
|
|
grp->used = grp->used & ~if_group_use;
|
|
|
|
group_set = clear_group_from_set(group_set, grp);
|
|
}
|
|
interfaces[ioif].used = 0;
|
|
interfaces[ioif].owner = NULL;
|
|
|
|
DBG(printk("GPIO pins: available before: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
gpio_in_pins, gpio_out_pins, gpio_pb_pins));
|
|
DBG(printk("freeing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
interfaces[ioif].gpio_g_in,
|
|
interfaces[ioif].gpio_g_out,
|
|
interfaces[ioif].gpio_b));
|
|
|
|
gpio_in_pins |= interfaces[ioif].gpio_g_in;
|
|
gpio_out_pins |= interfaces[ioif].gpio_g_out;
|
|
gpio_pb_pins |= interfaces[ioif].gpio_b;
|
|
|
|
DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
|
|
gpio_in_pins, gpio_out_pins, gpio_pb_pins));
|
|
|
|
local_irq_restore(flags);
|
|
|
|
notify_watchers();
|
|
}
|
|
|
|
/* Create a bitmask from bit 0 (inclusive) to bit stop_bit
|
|
(non-inclusive). stop_bit == 0 returns 0x0 */
|
|
static inline unsigned int create_mask(const unsigned stop_bit)
|
|
{
|
|
/* Avoid overflow */
|
|
if (stop_bit >= 32) {
|
|
return 0xffffffff;
|
|
}
|
|
return (1<<stop_bit)-1;
|
|
}
|
|
|
|
|
|
/* port can be 'a', 'b' or 'g' */
|
|
int cris_io_interface_allocate_pins(const enum cris_io_interface ioif,
|
|
const char port,
|
|
const unsigned start_bit,
|
|
const unsigned stop_bit)
|
|
{
|
|
unsigned int i;
|
|
unsigned int mask = 0;
|
|
unsigned int tmp_mask;
|
|
unsigned long int flags;
|
|
enum cris_io_interface *owners;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
DBG(printk("cris_io_interface_allocate_pins: if=%d port=%c start=%u stop=%u\n",
|
|
ioif, port, start_bit, stop_bit));
|
|
|
|
if (!((start_bit <= stop_bit) &&
|
|
((((port == 'a') || (port == 'b')) && (stop_bit < 8)) ||
|
|
((port == 'g') && (stop_bit < 32))))) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
mask = create_mask(stop_bit + 1);
|
|
tmp_mask = create_mask(start_bit);
|
|
mask &= ~tmp_mask;
|
|
|
|
DBG(printk("cris_io_interface_allocate_pins: port=%c start=%u stop=%u mask=0x%08x\n",
|
|
port, start_bit, stop_bit, mask));
|
|
|
|
local_irq_save(flags);
|
|
|
|
switch (port) {
|
|
case 'a':
|
|
if ((gpio_pa_pins & mask) != mask) {
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
owners = gpio_pa_owners;
|
|
gpio_pa_pins &= ~mask;
|
|
break;
|
|
case 'b':
|
|
if ((gpio_pb_pins & mask) != mask) {
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
owners = gpio_pb_owners;
|
|
gpio_pb_pins &= ~mask;
|
|
break;
|
|
case 'g':
|
|
if (((gpio_in_pins & mask) != mask) ||
|
|
((gpio_out_pins & mask) != mask)) {
|
|
local_irq_restore(flags);
|
|
return -EBUSY;
|
|
}
|
|
owners = gpio_pg_owners;
|
|
gpio_in_pins &= ~mask;
|
|
gpio_out_pins &= ~mask;
|
|
break;
|
|
default:
|
|
local_irq_restore(flags);
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (i = start_bit; i <= stop_bit; i++) {
|
|
owners[i] = ioif;
|
|
}
|
|
local_irq_restore(flags);
|
|
|
|
notify_watchers();
|
|
return 0;
|
|
}
|
|
|
|
|
|
/* port can be 'a', 'b' or 'g' */
|
|
int cris_io_interface_free_pins(const enum cris_io_interface ioif,
|
|
const char port,
|
|
const unsigned start_bit,
|
|
const unsigned stop_bit)
|
|
{
|
|
unsigned int i;
|
|
unsigned int mask = 0;
|
|
unsigned int tmp_mask;
|
|
unsigned long int flags;
|
|
enum cris_io_interface *owners;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
if (!((start_bit <= stop_bit) &&
|
|
((((port == 'a') || (port == 'b')) && (stop_bit < 8)) ||
|
|
((port == 'g') && (stop_bit < 32))))) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
mask = create_mask(stop_bit + 1);
|
|
tmp_mask = create_mask(start_bit);
|
|
mask &= ~tmp_mask;
|
|
|
|
DBG(printk("cris_io_interface_free_pins: port=%c start=%u stop=%u mask=0x%08x\n",
|
|
port, start_bit, stop_bit, mask));
|
|
|
|
local_irq_save(flags);
|
|
|
|
switch (port) {
|
|
case 'a':
|
|
if ((~gpio_pa_pins & mask) != mask) {
|
|
local_irq_restore(flags);
|
|
printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
|
|
}
|
|
owners = gpio_pa_owners;
|
|
break;
|
|
case 'b':
|
|
if ((~gpio_pb_pins & mask) != mask) {
|
|
local_irq_restore(flags);
|
|
printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
|
|
}
|
|
owners = gpio_pb_owners;
|
|
break;
|
|
case 'g':
|
|
if (((~gpio_in_pins & mask) != mask) ||
|
|
((~gpio_out_pins & mask) != mask)) {
|
|
local_irq_restore(flags);
|
|
printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
|
|
}
|
|
owners = gpio_pg_owners;
|
|
break;
|
|
default:
|
|
owners = NULL; /* Cannot happen. Shut up, gcc! */
|
|
}
|
|
|
|
for (i = start_bit; i <= stop_bit; i++) {
|
|
if (owners[i] != ioif) {
|
|
printk(KERN_CRIT "cris_io_interface_free_pins: Freeing unowned pins");
|
|
}
|
|
}
|
|
|
|
/* All was ok, change data. */
|
|
switch (port) {
|
|
case 'a':
|
|
gpio_pa_pins |= mask;
|
|
break;
|
|
case 'b':
|
|
gpio_pb_pins |= mask;
|
|
break;
|
|
case 'g':
|
|
gpio_in_pins |= mask;
|
|
gpio_out_pins |= mask;
|
|
break;
|
|
}
|
|
|
|
for (i = start_bit; i <= stop_bit; i++) {
|
|
owners[i] = if_unclaimed;
|
|
}
|
|
local_irq_restore(flags);
|
|
notify_watchers();
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int cris_io_interface_register_watcher(void (*notify)(const unsigned int gpio_in_available,
|
|
const unsigned int gpio_out_available,
|
|
const unsigned char pa_available,
|
|
const unsigned char pb_available))
|
|
{
|
|
struct watcher *w;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
if (NULL == notify) {
|
|
return -EINVAL;
|
|
}
|
|
w = kmalloc(sizeof(*w), GFP_KERNEL);
|
|
if (!w) {
|
|
return -ENOMEM;
|
|
}
|
|
w->notify = notify;
|
|
w->next = watchers;
|
|
watchers = w;
|
|
|
|
w->notify((const unsigned int)gpio_in_pins,
|
|
(const unsigned int)gpio_out_pins,
|
|
(const unsigned char)gpio_pa_pins,
|
|
(const unsigned char)gpio_pb_pins);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available,
|
|
const unsigned int gpio_out_available,
|
|
const unsigned char pa_available,
|
|
const unsigned char pb_available))
|
|
{
|
|
struct watcher *w = watchers, *prev = NULL;
|
|
|
|
(void)cris_io_interface_init();
|
|
|
|
while ((NULL != w) && (w->notify != notify)){
|
|
prev = w;
|
|
w = w->next;
|
|
}
|
|
if (NULL != w) {
|
|
if (NULL != prev) {
|
|
prev->next = w->next;
|
|
} else {
|
|
watchers = w->next;
|
|
}
|
|
kfree(w);
|
|
return;
|
|
}
|
|
printk(KERN_WARNING "cris_io_interface_delete_watcher: Deleting unknown watcher 0x%p\n", notify);
|
|
}
|
|
|
|
|
|
static int cris_io_interface_init(void)
|
|
{
|
|
static int first = 1;
|
|
int i;
|
|
|
|
if (!first) {
|
|
return 0;
|
|
}
|
|
first = 0;
|
|
|
|
for (i = 0; i<8; i++) {
|
|
gpio_pa_owners[i] = if_unclaimed;
|
|
gpio_pb_owners[i] = if_unclaimed;
|
|
gpio_pg_owners[i] = if_unclaimed;
|
|
}
|
|
for (; i<32; i++) {
|
|
gpio_pg_owners[i] = if_unclaimed;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
module_init(cris_io_interface_init);
|
|
|
|
|
|
EXPORT_SYMBOL(cris_request_io_interface);
|
|
EXPORT_SYMBOL(cris_free_io_interface);
|
|
EXPORT_SYMBOL(cris_io_interface_allocate_pins);
|
|
EXPORT_SYMBOL(cris_io_interface_free_pins);
|
|
EXPORT_SYMBOL(cris_io_interface_register_watcher);
|
|
EXPORT_SYMBOL(cris_io_interface_delete_watcher);
|