mirror of
https://github.com/torvalds/linux
synced 2024-10-16 16:29:20 +00:00
41af5436e8
The AP LAN RX endpoint should not have download checksum offload
enabled.
The receive handler does properly accommodate the trailer that's
added by the hardware, but we ignore it.
Fixes: 1ed7d0c0fd ("soc: qcom: ipa: configuration data")
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
336 lines
6.2 KiB
C
336 lines
6.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2019-2020 Linaro Ltd.
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*/
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#include <linux/log2.h>
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#include "gsi.h"
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#include "ipa_data.h"
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#include "ipa_endpoint.h"
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#include "ipa_mem.h"
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/* Endpoint configuration for the SDM845 SoC. */
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static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
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[IPA_ENDPOINT_AP_COMMAND_TX] = {
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.ee_id = GSI_EE_AP,
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.channel_id = 4,
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.endpoint_id = 5,
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.toward_ipa = true,
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.channel = {
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.tre_count = 512,
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.event_count = 256,
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.tlv_count = 20,
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},
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.endpoint = {
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.seq_type = IPA_SEQ_DMA_ONLY,
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.config = {
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.dma_mode = true,
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.dma_endpoint = IPA_ENDPOINT_AP_LAN_RX,
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},
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},
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},
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[IPA_ENDPOINT_AP_LAN_RX] = {
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.ee_id = GSI_EE_AP,
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.channel_id = 5,
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.endpoint_id = 9,
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.toward_ipa = false,
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.channel = {
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.tre_count = 256,
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.event_count = 256,
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.tlv_count = 8,
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},
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.endpoint = {
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.seq_type = IPA_SEQ_INVALID,
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.config = {
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.aggregation = true,
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.status_enable = true,
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.rx = {
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.pad_align = ilog2(sizeof(u32)),
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},
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},
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},
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},
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[IPA_ENDPOINT_AP_MODEM_TX] = {
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.ee_id = GSI_EE_AP,
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.channel_id = 3,
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.endpoint_id = 2,
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.toward_ipa = true,
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.channel = {
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.tre_count = 512,
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.event_count = 512,
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.tlv_count = 16,
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},
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.endpoint = {
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.filter_support = true,
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.seq_type =
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IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
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.config = {
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.checksum = true,
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.qmap = true,
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.status_enable = true,
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.tx = {
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.status_endpoint =
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IPA_ENDPOINT_MODEM_AP_RX,
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},
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},
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},
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},
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[IPA_ENDPOINT_AP_MODEM_RX] = {
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.ee_id = GSI_EE_AP,
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.channel_id = 6,
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.endpoint_id = 10,
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.toward_ipa = false,
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.channel = {
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.tre_count = 256,
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.event_count = 256,
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.tlv_count = 8,
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},
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.endpoint = {
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.seq_type = IPA_SEQ_INVALID,
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.config = {
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.checksum = true,
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.qmap = true,
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.aggregation = true,
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.rx = {
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.aggr_close_eof = true,
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},
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},
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},
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},
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[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
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.ee_id = GSI_EE_MODEM,
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.channel_id = 1,
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.endpoint_id = 4,
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.toward_ipa = true,
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},
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[IPA_ENDPOINT_MODEM_LAN_TX] = {
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.ee_id = GSI_EE_MODEM,
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.channel_id = 0,
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.endpoint_id = 3,
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.toward_ipa = true,
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.endpoint = {
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.filter_support = true,
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},
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},
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[IPA_ENDPOINT_MODEM_LAN_RX] = {
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.ee_id = GSI_EE_MODEM,
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.channel_id = 3,
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.endpoint_id = 13,
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.toward_ipa = false,
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},
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[IPA_ENDPOINT_MODEM_AP_TX] = {
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.ee_id = GSI_EE_MODEM,
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.channel_id = 4,
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.endpoint_id = 6,
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.toward_ipa = true,
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.endpoint = {
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.filter_support = true,
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},
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},
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[IPA_ENDPOINT_MODEM_AP_RX] = {
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.ee_id = GSI_EE_MODEM,
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.channel_id = 2,
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.endpoint_id = 12,
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.toward_ipa = false,
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},
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};
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/* For the SDM845, resource groups are allocated this way:
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* group 0: LWA_DL
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* group 1: UL_DL
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*/
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static const struct ipa_resource_src ipa_resource_src[] = {
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{
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.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
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.limits[0] = {
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.min = 1,
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.max = 63,
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},
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.limits[1] = {
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.min = 1,
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.max = 63,
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},
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},
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{
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.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
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.limits[0] = {
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.min = 10,
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.max = 10,
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},
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.limits[1] = {
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.min = 10,
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.max = 10,
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},
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},
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{
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.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
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.limits[0] = {
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.min = 12,
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.max = 12,
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},
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.limits[1] = {
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.min = 14,
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.max = 14,
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},
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},
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{
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.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
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.limits[0] = {
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.min = 0,
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.max = 63,
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},
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.limits[1] = {
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.min = 0,
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.max = 63,
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},
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},
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{
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.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
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.limits[0] = {
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.min = 14,
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.max = 14,
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},
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.limits[1] = {
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.min = 20,
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.max = 20,
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},
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},
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};
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static const struct ipa_resource_dst ipa_resource_dst[] = {
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{
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.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
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.limits[0] = {
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.min = 4,
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.max = 4,
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},
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.limits[1] = {
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.min = 4,
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.max = 4,
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},
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},
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{
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.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
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.limits[0] = {
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.min = 2,
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.max = 63,
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},
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.limits[1] = {
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.min = 1,
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.max = 63,
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},
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},
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};
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/* Resource configuration for the SDM845 SoC. */
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static const struct ipa_resource_data ipa_resource_data = {
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.resource_src_count = ARRAY_SIZE(ipa_resource_src),
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.resource_src = ipa_resource_src,
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.resource_dst_count = ARRAY_SIZE(ipa_resource_dst),
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.resource_dst = ipa_resource_dst,
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};
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/* IPA-resident memory region configuration for the SDM845 SoC. */
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static const struct ipa_mem ipa_mem_local_data[] = {
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[IPA_MEM_UC_SHARED] = {
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.offset = 0x0000,
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.size = 0x0080,
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.canary_count = 0,
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},
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[IPA_MEM_UC_INFO] = {
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.offset = 0x0080,
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.size = 0x0200,
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.canary_count = 0,
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},
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[IPA_MEM_V4_FILTER_HASHED] = {
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.offset = 0x0288,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V4_FILTER] = {
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.offset = 0x0308,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V6_FILTER_HASHED] = {
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.offset = 0x0388,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V6_FILTER] = {
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.offset = 0x0408,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V4_ROUTE_HASHED] = {
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.offset = 0x0488,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V4_ROUTE] = {
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.offset = 0x0508,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V6_ROUTE_HASHED] = {
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.offset = 0x0588,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_V6_ROUTE] = {
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.offset = 0x0608,
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.size = 0x0078,
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.canary_count = 2,
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},
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[IPA_MEM_MODEM_HEADER] = {
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.offset = 0x0688,
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.size = 0x0140,
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.canary_count = 2,
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},
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[IPA_MEM_AP_HEADER] = {
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.offset = 0x07c8,
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.size = 0x0000,
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.canary_count = 0,
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},
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[IPA_MEM_MODEM_PROC_CTX] = {
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.offset = 0x07d0,
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.size = 0x0200,
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.canary_count = 2,
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},
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[IPA_MEM_AP_PROC_CTX] = {
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.offset = 0x09d0,
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.size = 0x0200,
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.canary_count = 0,
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},
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[IPA_MEM_MODEM] = {
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.offset = 0x0bd8,
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.size = 0x1024,
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.canary_count = 0,
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},
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[IPA_MEM_UC_EVENT_RING] = {
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.offset = 0x1c00,
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.size = 0x0400,
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.canary_count = 1,
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},
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};
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static struct ipa_mem_data ipa_mem_data = {
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.local_count = ARRAY_SIZE(ipa_mem_local_data),
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.local = ipa_mem_local_data,
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.imem_addr = 0x146bd000,
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.imem_size = 0x00002000,
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.smem_id = 497,
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.smem_size = 0x00002000,
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};
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/* Configuration data for the SDM845 SoC. */
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const struct ipa_data ipa_data_sdm845 = {
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.version = IPA_VERSION_3_5_1,
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.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
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.endpoint_data = ipa_gsi_endpoint_data,
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.resource_data = &ipa_resource_data,
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.mem_data = &ipa_mem_data,
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};
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