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https://github.com/torvalds/linux
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147c05168f
The code is only slightly modified : entry points now use the FIXUP_ENDIAN trampoline to switch endian order. The 32bit wrapper is kept for big endian kernels and 64bit is enforced for little endian kernels with a PPC64_BOOT_WRAPPER config option. The linker script is generated using the kernel preprocessor flags to make use of the CONFIG_* definitions and the wrapper script is modified to take into account the new elf64ppc format. Finally, the zImage file is compiled as a position independent executable (-pie) which makes it loadable at any address by the firmware. Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
300 lines
6.9 KiB
ArmAsm
300 lines
6.9 KiB
ArmAsm
/*
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* Copyright (C) Paul Mackerras 1997.
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*
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* Adapted for 64 bit LE PowerPC by Andrew Tauferner
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include "ppc_asm.h"
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RELA = 7
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RELACOUNT = 0x6ffffff9
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.text
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/* A procedure descriptor used when booting this as a COFF file.
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* When making COFF, this comes first in the link and we're
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* linked at 0x500000.
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*/
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.globl _zimage_start_opd
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_zimage_start_opd:
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.long 0x500000, 0, 0, 0
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#ifdef __powerpc64__
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.balign 8
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p_start: .llong _start
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p_etext: .llong _etext
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p_bss_start: .llong __bss_start
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p_end: .llong _end
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p_toc: .llong __toc_start + 0x8000 - p_base
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p_dyn: .llong __dynamic_start - p_base
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p_rela: .llong __rela_dyn_start - p_base
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p_prom: .llong 0
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.weak _platform_stack_top
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p_pstack: .llong _platform_stack_top
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#else
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p_start: .long _start
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p_etext: .long _etext
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p_bss_start: .long __bss_start
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p_end: .long _end
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.weak _platform_stack_top
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p_pstack: .long _platform_stack_top
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#endif
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.weak _zimage_start
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.globl _zimage_start
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_zimage_start:
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.globl _zimage_start_lib
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_zimage_start_lib:
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/* Work out the offset between the address we were linked at
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and the address where we're running. */
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bl .+4
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p_base: mflr r10 /* r10 now points to runtime addr of p_base */
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#ifndef __powerpc64__
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/* grab the link address of the dynamic section in r11 */
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addis r11,r10,(_GLOBAL_OFFSET_TABLE_-p_base)@ha
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lwz r11,(_GLOBAL_OFFSET_TABLE_-p_base)@l(r11)
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cmpwi r11,0
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beq 3f /* if not linked -pie */
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/* get the runtime address of the dynamic section in r12 */
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.weak __dynamic_start
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addis r12,r10,(__dynamic_start-p_base)@ha
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addi r12,r12,(__dynamic_start-p_base)@l
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subf r11,r11,r12 /* runtime - linktime offset */
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/* The dynamic section contains a series of tagged entries.
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* We need the RELA and RELACOUNT entries. */
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li r9,0
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li r0,0
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9: lwz r8,0(r12) /* get tag */
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cmpwi r8,0
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beq 10f /* end of list */
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cmpwi r8,RELA
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bne 11f
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lwz r9,4(r12) /* get RELA pointer in r9 */
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b 12f
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11: addis r8,r8,(-RELACOUNT)@ha
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cmpwi r8,RELACOUNT@l
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bne 12f
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lwz r0,4(r12) /* get RELACOUNT value in r0 */
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12: addi r12,r12,8
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b 9b
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/* The relocation section contains a list of relocations.
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* We now do the R_PPC_RELATIVE ones, which point to words
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* which need to be initialized with addend + offset.
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* The R_PPC_RELATIVE ones come first and there are RELACOUNT
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* of them. */
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10: /* skip relocation if we don't have both */
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cmpwi r0,0
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beq 3f
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cmpwi r9,0
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beq 3f
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add r9,r9,r11 /* Relocate RELA pointer */
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mtctr r0
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2: lbz r0,4+3(r9) /* ELF32_R_INFO(reloc->r_info) */
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cmpwi r0,22 /* R_PPC_RELATIVE */
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bne 3f
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lwz r12,0(r9) /* reloc->r_offset */
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lwz r0,8(r9) /* reloc->r_addend */
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add r0,r0,r11
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stwx r0,r11,r12
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addi r9,r9,12
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bdnz 2b
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/* Do a cache flush for our text, in case the loader didn't */
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3: lwz r9,p_start-p_base(r10) /* note: these are relocated now */
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lwz r8,p_etext-p_base(r10)
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4: dcbf r0,r9
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icbi r0,r9
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addi r9,r9,0x20
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cmplw cr0,r9,r8
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blt 4b
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sync
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isync
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/* Clear the BSS */
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lwz r9,p_bss_start-p_base(r10)
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lwz r8,p_end-p_base(r10)
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li r0,0
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5: stw r0,0(r9)
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addi r9,r9,4
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cmplw cr0,r9,r8
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blt 5b
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/* Possibly set up a custom stack */
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lwz r8,p_pstack-p_base(r10)
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cmpwi r8,0
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beq 6f
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lwz r1,0(r8)
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li r0,0
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stwu r0,-16(r1) /* establish a stack frame */
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6:
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#else /* __powerpc64__ */
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/* Save the prom pointer at p_prom. */
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std r5,(p_prom-p_base)(r10)
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/* Set r2 to the TOC. */
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ld r2,(p_toc-p_base)(r10)
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add r2,r2,r10
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/* Grab the link address of the dynamic section in r11. */
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ld r11,-32768(r2)
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cmpwi r11,0
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beq 3f /* if not linked -pie then no dynamic section */
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ld r11,(p_dyn-p_base)(r10)
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add r11,r11,r10
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ld r9,(p_rela-p_base)(r10)
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add r9,r9,r10
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li r7,0
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li r8,0
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9: ld r6,0(r11) /* get tag */
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cmpdi r6,0
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beq 12f /* end of list */
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cmpdi r6,RELA
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bne 10f
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ld r7,8(r11) /* get RELA pointer in r7 */
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b 11f
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10: addis r6,r6,(-RELACOUNT)@ha
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cmpdi r6,RELACOUNT@l
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bne 11f
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ld r8,8(r11) /* get RELACOUNT value in r8 */
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11: addi r11,r11,16
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b 9b
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12:
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cmpdi r7,0 /* check we have both RELA and RELACOUNT */
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cmpdi cr1,r8,0
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beq 3f
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beq cr1,3f
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/* Calcuate the runtime offset. */
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subf r7,r7,r9
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/* Run through the list of relocations and process the
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* R_PPC64_RELATIVE ones. */
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mtctr r8
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13: ld r0,8(r9) /* ELF64_R_TYPE(reloc->r_info) */
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cmpdi r0,22 /* R_PPC64_RELATIVE */
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bne 3f
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ld r6,0(r9) /* reloc->r_offset */
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ld r0,16(r9) /* reloc->r_addend */
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add r0,r0,r7
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stdx r0,r7,r6
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addi r9,r9,24
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bdnz 13b
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/* Do a cache flush for our text, in case the loader didn't */
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3: ld r9,p_start-p_base(r10) /* note: these are relocated now */
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ld r8,p_etext-p_base(r10)
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4: dcbf r0,r9
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icbi r0,r9
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addi r9,r9,0x20
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cmpld cr0,r9,r8
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blt 4b
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sync
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isync
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/* Clear the BSS */
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ld r9,p_bss_start-p_base(r10)
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ld r8,p_end-p_base(r10)
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li r0,0
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5: std r0,0(r9)
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addi r9,r9,8
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cmpld cr0,r9,r8
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blt 5b
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/* Possibly set up a custom stack */
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ld r8,p_pstack-p_base(r10)
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cmpdi r8,0
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beq 6f
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ld r1,0(r8)
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li r0,0
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stdu r0,-16(r1) /* establish a stack frame */
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6:
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#endif /* __powerpc64__ */
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/* Call platform_init() */
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bl platform_init
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/* Call start */
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b start
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#ifdef __powerpc64__
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#define PROM_FRAME_SIZE 512
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#define SAVE_GPR(n, base) std n,8*(n)(base)
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#define REST_GPR(n, base) ld n,8*(n)(base)
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#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
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#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
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#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
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#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
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#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
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#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
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#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
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#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
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/* prom handles the jump into and return from firmware. The prom args pointer
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is loaded in r3. */
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.globl prom
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prom:
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mflr r0
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std r0,16(r1)
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stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
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SAVE_GPR(2, r1)
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SAVE_GPR(13, r1)
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SAVE_8GPRS(14, r1)
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SAVE_10GPRS(22, r1)
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mfcr r10
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std r10,8*32(r1)
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mfmsr r10
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std r10,8*33(r1)
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/* remove MSR_LE from msr but keep MSR_SF */
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mfmsr r10
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rldicr r10,r10,0,62
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mtsrr1 r10
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/* Load FW address, set LR to label 1, and jump to FW */
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bl 0f
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0: mflr r10
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addi r11,r10,(1f-0b)
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mtlr r11
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ld r10,(p_prom-0b)(r10)
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mtsrr0 r10
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rfid
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1: /* Return from OF */
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FIXUP_ENDIAN
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/* Restore registers and return. */
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rldicl r1,r1,0,32
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/* Restore the MSR (back to 64 bits) */
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ld r10,8*(33)(r1)
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mtmsr r10
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isync
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/* Restore other registers */
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REST_GPR(2, r1)
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REST_GPR(13, r1)
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REST_8GPRS(14, r1)
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REST_10GPRS(22, r1)
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ld r10,8*32(r1)
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mtcr r10
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addi r1,r1,PROM_FRAME_SIZE
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ld r0,16(r1)
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mtlr r0
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blr
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#endif
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