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b38434145b
McASP1 TX interrupt is 30, not 32 on DM646x DMSoC. While at it remove the bogus AEMIF interrupt entry from dm646x_default_priorities[]. AEMIF interrupt on DM6467 is 60 not 30 and the entry for the correct interrupt number is already present in the same table. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [nsekhar@ti.com: remove bogus entry from dm646x_default_priorities[]] Signed-off-by: Sekhar Nori <nsekhar@ti.com> |
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.. | ||
clock.h | ||
common.h | ||
cp_intc.h | ||
cpufreq.h | ||
cpuidle.h | ||
cputype.h | ||
da8xx.h | ||
ddr2.h | ||
entry-macro.S | ||
hardware.h | ||
irqs.h | ||
mux.h | ||
pm.h | ||
psc.h | ||
serial.h | ||
sram.h | ||
time.h | ||
uncompress.h |