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8d0d56ba24
Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC "BASE_BAUD" is calculated dynamically in runtime, basically it is an alias to arc_early_base_baud(), which in turn just does "arc_base_baud/16". 8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in "arc_base_baud" with this change. Additional compatibility string "snps,arc-sdp" is introduced as well because there're different flavours of AXS boards but they all share the same motherboard and so it's possible to re-use the same code for motherbord even if CPU daughterboard changes. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
21 lines
540 B
Text
21 lines
540 B
Text
/*
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* Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
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*
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* ARC AXS101 S/W development platform
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "axc001.dtsi"
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/include/ "axs10x_mb.dtsi"
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/ {
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compatible = "snps,axs101", "snps,arc-sdp";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";
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};
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};
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