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The standard PCIe configuration read-write interface is used to access the configuration space of the peripheral PCIe devices of the mips processor after the PCIe link surprise down, it can generate kernel panic caused by "Data bus error". So it is necessary to add PCIe link status check for system protection. When the PCIe link is down or in training, assigning a value of 0 to the configuration address can prevent read-write behavior to the configuration space of peripheral PCIe devices, thereby preventing kernel panic. Signed-off-by: Songyang Li <leesongyang@outlook.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
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| .. | ||
| fixup-ath79.c | ||
| fixup-bcm63xx.c | ||
| fixup-cobalt.c | ||
| fixup-fuloong2e.c | ||
| fixup-ip32.c | ||
| fixup-lantiq.c | ||
| fixup-lemote2f.c | ||
| fixup-malta.c | ||
| fixup-rbtx4927.c | ||
| fixup-rc32434.c | ||
| fixup-sb1250.c | ||
| fixup-sni.c | ||
| Makefile | ||
| msi-octeon.c | ||
| ops-bcm63xx.c | ||
| ops-bonito64.c | ||
| ops-gt64xxx_pci0.c | ||
| ops-lantiq.c | ||
| ops-loongson2.c | ||
| ops-mace.c | ||
| ops-msc.c | ||
| ops-rc32434.c | ||
| ops-sni.c | ||
| ops-tx4927.c | ||
| pci-alchemy.c | ||
| pci-ar71xx.c | ||
| pci-ar724x.c | ||
| pci-ar2315.c | ||
| pci-bcm47xx.c | ||
| pci-bcm63xx.c | ||
| pci-bcm63xx.h | ||
| pci-bcm1480.c | ||
| pci-bcm1480ht.c | ||
| pci-generic.c | ||
| pci-ip27.c | ||
| pci-ip32.c | ||
| pci-lantiq.c | ||
| pci-lantiq.h | ||
| pci-legacy.c | ||
| pci-malta.c | ||
| pci-mt7620.c | ||
| pci-octeon.c | ||
| pci-rc32434.c | ||
| pci-rt2880.c | ||
| pci-rt3883.c | ||
| pci-sb1250.c | ||
| pci-tx4927.c | ||
| pci-tx4938.c | ||
| pci-xtalk-bridge.c | ||
| pci.c | ||
| pcie-octeon.c | ||