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6fbde6b492
Current Loongson-3 code can share among all Loongson64 processors. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: chenhc@lemote.com Cc: paul.burton@mips.com
32 lines
786 B
C
32 lines
786 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LOONGSON_SMP_H_
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#define __LOONGSON_SMP_H_
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/* for Loongson-3 smp support */
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extern unsigned long long smp_group[4];
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/* 4 groups(nodes) in maximum in numa case */
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#define SMP_CORE_GROUP0_BASE (smp_group[0])
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#define SMP_CORE_GROUP1_BASE (smp_group[1])
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#define SMP_CORE_GROUP2_BASE (smp_group[2])
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#define SMP_CORE_GROUP3_BASE (smp_group[3])
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/* 4 cores in each group(node) */
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#define SMP_CORE0_OFFSET 0x000
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#define SMP_CORE1_OFFSET 0x100
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#define SMP_CORE2_OFFSET 0x200
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#define SMP_CORE3_OFFSET 0x300
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/* ipi registers offsets */
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#define STATUS0 0x00
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#define EN0 0x04
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#define SET0 0x08
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#define CLEAR0 0x0c
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#define STATUS1 0x10
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#define MASK1 0x14
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#define SET1 0x18
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#define CLEAR1 0x1c
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#define BUF 0x20
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#endif
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