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https://github.com/torvalds/linux
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162e134aed
Q: Do we have really have write buffer A: Yes, on newer Loongson processors there is a "store fill buffer" that will collect *cached* writes, on all Loongson processors AXI crossbar will buffer all writes. Q: Then why do we want to remove CPU_HAS_WB? A: Because CPU_HAS_WB introduces wbflush, which intends to flush all write reuqests to mmio device. We won't be affected by store fill buffer because it won't buffer uncached writes. And a regular memory barrier is sufficient to flush crossbar write buffer. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
24 lines
466 B
C
24 lines
466 B
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*/
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#include <linux/export.h>
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#include <linux/init.h>
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#include <asm/bootinfo.h>
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#include <linux/libfdt.h>
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#include <linux/of_fdt.h>
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#include <asm/prom.h>
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#include <loongson.h>
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void *loongson_fdt_blob;
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void __init plat_mem_setup(void)
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{
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if (loongson_fdt_blob)
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__dt_setup_arch(loongson_fdt_blob);
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}
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