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e4df2d5e85
Try to access RAM with the largest bit width possible, but without doing unaligned accesses. A further improvement could be to use multiple read and writes as the assembly version was trying to do. Tested on a BeagleV Starlight with a SiFive U74 core, where the improvement is noticeable. Signed-off-by: Matteo Croce <mcroce@microsoft.com> Co-developed-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
7 lines
180 B
Makefile
7 lines
180 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_CPU_NEED_SOFTALIGN) += alignment.o
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obj-y += bswapdi.o
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obj-y += bswapsi.o
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obj-y += cacheflush.o
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obj-y += mmap.o
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