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https://github.com/torvalds/linux
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5b0bf5e25e
Enable having ICM tables in coherent memory, and use coherent memory for the dMPT table. This will allow writing MPT entries for MRs both via the SW2HW_MPT command and also directly by the driver for FMR remapping without needing to flush or worry about cacheline boundaries. Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
137 lines
4.5 KiB
C
137 lines
4.5 KiB
C
/*
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* Copyright (c) 2005 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX4_ICM_H
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#define MLX4_ICM_H
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/mutex.h>
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#define MLX4_ICM_CHUNK_LEN \
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((256 - sizeof (struct list_head) - 2 * sizeof (int)) / \
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(sizeof (struct scatterlist)))
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enum {
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MLX4_ICM_PAGE_SHIFT = 12,
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MLX4_ICM_PAGE_SIZE = 1 << MLX4_ICM_PAGE_SHIFT,
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};
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struct mlx4_icm_chunk {
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struct list_head list;
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int npages;
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int nsg;
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struct scatterlist mem[MLX4_ICM_CHUNK_LEN];
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};
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struct mlx4_icm {
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struct list_head chunk_list;
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int refcount;
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};
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struct mlx4_icm_iter {
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struct mlx4_icm *icm;
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struct mlx4_icm_chunk *chunk;
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int page_idx;
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};
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struct mlx4_dev;
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struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
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gfp_t gfp_mask, int coherent);
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void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent);
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int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
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void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
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int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
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int start, int end);
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void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
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int start, int end);
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int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
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u64 virt, int obj_size, int nobj, int reserved,
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int use_lowmem, int use_coherent);
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void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table);
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int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
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void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj);
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void *mlx4_table_find(struct mlx4_icm_table *table, int obj);
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int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
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int start, int end);
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void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
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int start, int end);
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static inline void mlx4_icm_first(struct mlx4_icm *icm,
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struct mlx4_icm_iter *iter)
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{
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iter->icm = icm;
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iter->chunk = list_empty(&icm->chunk_list) ?
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NULL : list_entry(icm->chunk_list.next,
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struct mlx4_icm_chunk, list);
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iter->page_idx = 0;
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}
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static inline int mlx4_icm_last(struct mlx4_icm_iter *iter)
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{
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return !iter->chunk;
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}
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static inline void mlx4_icm_next(struct mlx4_icm_iter *iter)
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{
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if (++iter->page_idx >= iter->chunk->nsg) {
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if (iter->chunk->list.next == &iter->icm->chunk_list) {
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iter->chunk = NULL;
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return;
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}
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iter->chunk = list_entry(iter->chunk->list.next,
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struct mlx4_icm_chunk, list);
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iter->page_idx = 0;
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}
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}
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static inline dma_addr_t mlx4_icm_addr(struct mlx4_icm_iter *iter)
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{
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return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
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}
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static inline unsigned long mlx4_icm_size(struct mlx4_icm_iter *iter)
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{
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return sg_dma_len(&iter->chunk->mem[iter->page_idx]);
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}
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int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count);
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int mlx4_MAP_ICM_page(struct mlx4_dev *dev, u64 dma_addr, u64 virt);
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int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
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int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
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#endif /* MLX4_ICM_H */
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