mirror of
https://github.com/torvalds/linux
synced 2024-10-24 04:06:04 +00:00
5019f0b134
The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files. The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them. The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.kumar@st.com>
49 lines
1.8 KiB
C
49 lines
1.8 KiB
C
/*
|
|
* arch/arm/mach-spear3xx/include/mach/spear.h
|
|
*
|
|
* SPEAr3xx Machine family specific definition
|
|
*
|
|
* Copyright (C) 2009 ST Microelectronics
|
|
* Viresh Kumar<viresh.kumar@st.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#ifndef __MACH_SPEAR3XX_H
|
|
#define __MACH_SPEAR3XX_H
|
|
|
|
#include <asm/memory.h>
|
|
|
|
/* ICM1 - Low speed connection */
|
|
#define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
|
|
#define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000)
|
|
#define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
|
|
#define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
|
|
#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
|
|
|
|
/* ML1 - Multi Layer CPU Subsystem */
|
|
#define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
|
|
#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
|
|
#define SPEAR3XX_CPU_TMR_BASE UL(0xF0000000)
|
|
|
|
/* ICM3 - Basic Subsystem */
|
|
#define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
|
|
#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
|
|
#define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
|
|
#define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
|
|
#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
|
|
#define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
|
|
#define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
|
|
|
|
/* Debug uart for linux, will be used for debug and uncompress messages */
|
|
#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
|
|
#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
|
|
|
|
/* Sysctl base for spear platform */
|
|
#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
|
|
#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
|
|
|
|
#endif /* __MACH_SPEAR3XX_H */
|