Lukas Wunner 4fe2c13d59 cxl/pci: Handle excessive CDAT length ... If the length in the CDAT header is larger than the concatenation of the header and all table entries, then the CDAT exposed to user space contains trailing null bytes. Not every consumer may be able to handle that. Per Postel's robustness principle, "be liberal in what you accept" and silently reduce the cached length to avoid exposing those null bytes. Fixes: c97006046c ("cxl/port: Read CDAT table") Tested-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: stable@vger.kernel.org # v6.0+ Link: https://lore.kernel.org/r/6d98b3c7da5343172bd3ccabfabbc1f31c079d74.1678543498.git.lukas@wunner.de Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2023-04-03 16:16:49 -07:00
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core	cxl/pci: Handle excessive CDAT length	2023-04-03 16:16:49 -07:00
acpi.c	Merge branch 'for-6.3/cxl-ram-region' into cxl/next	2023-02-10 18:11:01 -08:00
cxl.h	cxl for v6.3	2023-02-25 09:19:23 -08:00
cxlmem.h	cxl for v6.3	2023-02-25 09:19:23 -08:00
cxlpci.h	cxl/pci: Handle truncated CDAT entries	2023-04-03 16:16:34 -07:00
Kconfig	Merge branch 'for-6.3/cxl-ram-region' into cxl/next	2023-02-10 18:11:01 -08:00
Makefile	cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation	2022-11-30 16:30:47 -08:00
mem.c	cxl/port: Add RCD endpoint port enumeration	2022-12-05 10:32:26 -08:00
pci.c	Merge branch 'for-6.3/cxl' into cxl/next	2023-02-14 15:06:08 -08:00
pmem.c	cxl/pmem: Fix nvdimm registration races	2023-02-13 17:01:05 -08:00
port.c	Merge branch 'for-6.3/cxl-rr-emu' into cxl/next	2023-02-14 16:06:10 -08:00
security.c	cxl/mbox: Enable cxl_mbox_send_cmd() users to validate output size	2022-12-06 14:36:02 -08:00