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039b167d68
The current internal sja1105 driver API is optimized for retrieving many
statistics counters at once. But the switch does not do atomic snapshotting
for them anyway.
In case we start reporting the hardware port counters through
ndo_get_stats64 as well, not just ethtool, it would be good to be able
to read individual port counters and not all of them.
Additionally, since Arnd Bergmann's commit ae1804de93 ("dsa: sja1105:
dynamically allocate stats structure"), sja1105_get_ethtool_stats
allocates memory dynamically, since struct sja1105_port_status was
deemed to consume too much stack memory. That is not ideal.
The large structure is only needed because of the burst read.
If we read statistics one by one, we can consume less memory, and
we can avoid dynamic allocation.
Additionally, latency-sensitive interfaces such as PTP operations (for
phc2sys) might suffer if the SPI mutex is being held for too long, which
happens in the case of SPI burst reads. By reading counters one by one,
we give a chance for higher priority processes to preempt and take the
SPI bus mutex for accessing the PTP clock.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
630 lines
10 KiB
C
630 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
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*/
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#include "sja1105.h"
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enum sja1105_counter_index {
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__SJA1105_COUNTER_UNUSED,
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/* MAC */
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N_RUNT,
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N_SOFERR,
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N_ALIGNERR,
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N_MIIERR,
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TYPEERR,
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SIZEERR,
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TCTIMEOUT,
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PRIORERR,
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NOMASTER,
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MEMOV,
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MEMERR,
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INVTYP,
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INTCYOV,
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DOMERR,
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PCFBAGDROP,
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SPCPRIOR,
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AGEPRIOR,
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PORTDROP,
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LENDROP,
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BAGDROP,
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POLICEERR,
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DRPNONA664ERR,
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SPCERR,
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AGEDRP,
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/* HL1 */
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N_N664ERR,
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N_VLANERR,
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N_UNRELEASED,
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N_SIZEERR,
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N_CRCERR,
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N_VLNOTFOUND,
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N_CTPOLERR,
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N_POLERR,
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N_RXFRM,
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N_RXBYTE,
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N_TXFRM,
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N_TXBYTE,
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/* HL2 */
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N_QFULL,
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N_PART_DROP,
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N_EGR_DISABLED,
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N_NOT_REACH,
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__MAX_SJA1105ET_PORT_COUNTER,
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/* P/Q/R/S only */
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/* ETHER */
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N_DROPS_NOLEARN = __MAX_SJA1105ET_PORT_COUNTER,
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N_DROPS_NOROUTE,
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N_DROPS_ILL_DTAG,
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N_DROPS_DTAG,
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N_DROPS_SOTAG,
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N_DROPS_SITAG,
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N_DROPS_UTAG,
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N_TX_BYTES_1024_2047,
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N_TX_BYTES_512_1023,
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N_TX_BYTES_256_511,
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N_TX_BYTES_128_255,
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N_TX_BYTES_65_127,
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N_TX_BYTES_64,
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N_TX_MCAST,
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N_TX_BCAST,
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N_RX_BYTES_1024_2047,
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N_RX_BYTES_512_1023,
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N_RX_BYTES_256_511,
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N_RX_BYTES_128_255,
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N_RX_BYTES_65_127,
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N_RX_BYTES_64,
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N_RX_MCAST,
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N_RX_BCAST,
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__MAX_SJA1105PQRS_PORT_COUNTER,
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};
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struct sja1105_port_counter {
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enum sja1105_stats_area area;
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const char name[ETH_GSTRING_LEN];
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int offset;
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int start;
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int end;
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bool is_64bit;
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};
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static const struct sja1105_port_counter sja1105_port_counters[] = {
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/* MAC-Level Diagnostic Counters */
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[N_RUNT] = {
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.area = MAC,
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.name = "n_runt",
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.offset = 0,
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.start = 31,
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.end = 24,
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},
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[N_SOFERR] = {
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.area = MAC,
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.name = "n_soferr",
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.offset = 0x0,
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.start = 23,
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.end = 16,
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},
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[N_ALIGNERR] = {
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.area = MAC,
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.name = "n_alignerr",
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.offset = 0x0,
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.start = 15,
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.end = 8,
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},
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[N_MIIERR] = {
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.area = MAC,
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.name = "n_miierr",
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.offset = 0x0,
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.start = 7,
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.end = 0,
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},
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/* MAC-Level Diagnostic Flags */
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[TYPEERR] = {
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.area = MAC,
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.name = "typeerr",
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.offset = 0x1,
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.start = 27,
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.end = 27,
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},
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[SIZEERR] = {
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.area = MAC,
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.name = "sizeerr",
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.offset = 0x1,
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.start = 26,
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.end = 26,
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},
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[TCTIMEOUT] = {
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.area = MAC,
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.name = "tctimeout",
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.offset = 0x1,
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.start = 25,
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.end = 25,
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},
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[PRIORERR] = {
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.area = MAC,
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.name = "priorerr",
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.offset = 0x1,
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.start = 24,
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.end = 24,
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},
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[NOMASTER] = {
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.area = MAC,
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.name = "nomaster",
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.offset = 0x1,
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.start = 23,
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.end = 23,
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},
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[MEMOV] = {
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.area = MAC,
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.name = "memov",
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.offset = 0x1,
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.start = 22,
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.end = 22,
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},
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[MEMERR] = {
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.area = MAC,
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.name = "memerr",
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.offset = 0x1,
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.start = 21,
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.end = 21,
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},
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[INVTYP] = {
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.area = MAC,
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.name = "invtyp",
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.offset = 0x1,
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.start = 19,
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.end = 19,
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},
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[INTCYOV] = {
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.area = MAC,
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.name = "intcyov",
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.offset = 0x1,
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.start = 18,
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.end = 18,
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},
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[DOMERR] = {
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.area = MAC,
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.name = "domerr",
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.offset = 0x1,
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.start = 17,
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.end = 17,
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},
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[PCFBAGDROP] = {
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.area = MAC,
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.name = "pcfbagdrop",
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.offset = 0x1,
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.start = 16,
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.end = 16,
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},
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[SPCPRIOR] = {
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.area = MAC,
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.name = "spcprior",
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.offset = 0x1,
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.start = 15,
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.end = 12,
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},
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[AGEPRIOR] = {
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.area = MAC,
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.name = "ageprior",
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.offset = 0x1,
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.start = 11,
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.end = 8,
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},
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[PORTDROP] = {
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.area = MAC,
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.name = "portdrop",
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.offset = 0x1,
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.start = 6,
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.end = 6,
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},
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[LENDROP] = {
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.area = MAC,
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.name = "lendrop",
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.offset = 0x1,
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.start = 5,
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.end = 5,
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},
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[BAGDROP] = {
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.area = MAC,
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.name = "bagdrop",
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.offset = 0x1,
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.start = 4,
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.end = 4,
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},
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[POLICEERR] = {
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.area = MAC,
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.name = "policeerr",
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.offset = 0x1,
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.start = 3,
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.end = 3,
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},
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[DRPNONA664ERR] = {
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.area = MAC,
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.name = "drpnona664err",
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.offset = 0x1,
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.start = 2,
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.end = 2,
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},
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[SPCERR] = {
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.area = MAC,
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.name = "spcerr",
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.offset = 0x1,
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.start = 1,
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.end = 1,
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},
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[AGEDRP] = {
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.area = MAC,
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.name = "agedrp",
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.offset = 0x1,
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.start = 0,
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.end = 0,
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},
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/* High-Level Diagnostic Counters */
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[N_N664ERR] = {
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.area = HL1,
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.name = "n_n664err",
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.offset = 0xF,
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.start = 31,
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.end = 0,
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},
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[N_VLANERR] = {
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.area = HL1,
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.name = "n_vlanerr",
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.offset = 0xE,
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.start = 31,
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.end = 0,
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},
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[N_UNRELEASED] = {
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.area = HL1,
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.name = "n_unreleased",
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.offset = 0xD,
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.start = 31,
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.end = 0,
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},
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[N_SIZEERR] = {
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.area = HL1,
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.name = "n_sizeerr",
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.offset = 0xC,
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.start = 31,
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.end = 0,
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},
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[N_CRCERR] = {
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.area = HL1,
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.name = "n_crcerr",
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.offset = 0xB,
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.start = 31,
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.end = 0,
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},
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[N_VLNOTFOUND] = {
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.area = HL1,
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.name = "n_vlnotfound",
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.offset = 0xA,
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.start = 31,
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.end = 0,
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},
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[N_CTPOLERR] = {
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.area = HL1,
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.name = "n_ctpolerr",
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.offset = 0x9,
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.start = 31,
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.end = 0,
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},
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[N_POLERR] = {
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.area = HL1,
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.name = "n_polerr",
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.offset = 0x8,
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.start = 31,
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.end = 0,
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},
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[N_RXFRM] = {
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.area = HL1,
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.name = "n_rxfrm",
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.offset = 0x6,
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.start = 31,
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.end = 0,
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.is_64bit = true,
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},
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[N_RXBYTE] = {
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.area = HL1,
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.name = "n_rxbyte",
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.offset = 0x4,
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.start = 31,
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.end = 0,
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.is_64bit = true,
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},
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[N_TXFRM] = {
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.area = HL1,
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.name = "n_txfrm",
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.offset = 0x2,
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.start = 31,
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.end = 0,
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.is_64bit = true,
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},
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[N_TXBYTE] = {
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.area = HL1,
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.name = "n_txbyte",
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.offset = 0x0,
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.start = 31,
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.end = 0,
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.is_64bit = true,
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},
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[N_QFULL] = {
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.area = HL2,
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.name = "n_qfull",
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.offset = 0x3,
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.start = 31,
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.end = 0,
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},
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[N_PART_DROP] = {
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.area = HL2,
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.name = "n_part_drop",
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.offset = 0x2,
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.start = 31,
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.end = 0,
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},
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[N_EGR_DISABLED] = {
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.area = HL2,
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.name = "n_egr_disabled",
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.offset = 0x1,
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.start = 31,
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.end = 0,
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},
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[N_NOT_REACH] = {
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.area = HL2,
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.name = "n_not_reach",
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.offset = 0x0,
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.start = 31,
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.end = 0,
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},
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/* Ether Stats */
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[N_DROPS_NOLEARN] = {
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.area = ETHER,
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.name = "n_drops_nolearn",
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.offset = 0x16,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_NOROUTE] = {
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.area = ETHER,
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.name = "n_drops_noroute",
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.offset = 0x15,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_ILL_DTAG] = {
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.area = ETHER,
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.name = "n_drops_ill_dtag",
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.offset = 0x14,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_DTAG] = {
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.area = ETHER,
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.name = "n_drops_dtag",
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.offset = 0x13,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_SOTAG] = {
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.area = ETHER,
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.name = "n_drops_sotag",
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.offset = 0x12,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_SITAG] = {
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.area = ETHER,
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.name = "n_drops_sitag",
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.offset = 0x11,
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.start = 31,
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.end = 0,
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},
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[N_DROPS_UTAG] = {
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.area = ETHER,
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.name = "n_drops_utag",
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.offset = 0x10,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_1024_2047] = {
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.area = ETHER,
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.name = "n_tx_bytes_1024_2047",
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.offset = 0x0F,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_512_1023] = {
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.area = ETHER,
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.name = "n_tx_bytes_512_1023",
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.offset = 0x0E,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_256_511] = {
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.area = ETHER,
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.name = "n_tx_bytes_256_511",
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.offset = 0x0D,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_128_255] = {
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.area = ETHER,
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.name = "n_tx_bytes_128_255",
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.offset = 0x0C,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_65_127] = {
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.area = ETHER,
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.name = "n_tx_bytes_65_127",
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.offset = 0x0B,
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.start = 31,
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.end = 0,
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},
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[N_TX_BYTES_64] = {
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.area = ETHER,
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.name = "n_tx_bytes_64",
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.offset = 0x0A,
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.start = 31,
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.end = 0,
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},
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[N_TX_MCAST] = {
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.area = ETHER,
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.name = "n_tx_mcast",
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.offset = 0x09,
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.start = 31,
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.end = 0,
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},
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[N_TX_BCAST] = {
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.area = ETHER,
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.name = "n_tx_bcast",
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.offset = 0x08,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_1024_2047] = {
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.area = ETHER,
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.name = "n_rx_bytes_1024_2047",
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.offset = 0x07,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_512_1023] = {
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.area = ETHER,
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.name = "n_rx_bytes_512_1023",
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.offset = 0x06,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_256_511] = {
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.area = ETHER,
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.name = "n_rx_bytes_256_511",
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.offset = 0x05,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_128_255] = {
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.area = ETHER,
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.name = "n_rx_bytes_128_255",
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.offset = 0x04,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_65_127] = {
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.area = ETHER,
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.name = "n_rx_bytes_65_127",
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.offset = 0x03,
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.start = 31,
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.end = 0,
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},
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[N_RX_BYTES_64] = {
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.area = ETHER,
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.name = "n_rx_bytes_64",
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.offset = 0x02,
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.start = 31,
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.end = 0,
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},
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[N_RX_MCAST] = {
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.area = ETHER,
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.name = "n_rx_mcast",
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.offset = 0x01,
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.start = 31,
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.end = 0,
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},
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[N_RX_BCAST] = {
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.area = ETHER,
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.name = "n_rx_bcast",
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.offset = 0x00,
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.start = 31,
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.end = 0,
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},
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};
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static int sja1105_port_counter_read(struct sja1105_private *priv, int port,
|
|
enum sja1105_counter_index idx, u64 *ctr)
|
|
{
|
|
const struct sja1105_port_counter *c = &sja1105_port_counters[idx];
|
|
size_t size = c->is_64bit ? 8 : 4;
|
|
u8 buf[8] = {0};
|
|
u64 regs;
|
|
int rc;
|
|
|
|
regs = priv->info->regs->stats[c->area][port];
|
|
|
|
rc = sja1105_xfer_buf(priv, SPI_READ, regs + c->offset, buf, size);
|
|
if (rc)
|
|
return rc;
|
|
|
|
sja1105_unpack(buf, ctr, c->start, c->end, size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
|
|
{
|
|
struct sja1105_private *priv = ds->priv;
|
|
enum sja1105_counter_index max_ctr, i;
|
|
int rc, k = 0;
|
|
|
|
if (priv->info->device_id == SJA1105E_DEVICE_ID ||
|
|
priv->info->device_id == SJA1105T_DEVICE_ID)
|
|
max_ctr = __MAX_SJA1105ET_PORT_COUNTER;
|
|
else
|
|
max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;
|
|
|
|
for (i = 0; i < max_ctr; i++) {
|
|
rc = sja1105_port_counter_read(priv, port, i, &data[k++]);
|
|
if (rc) {
|
|
dev_err(ds->dev,
|
|
"Failed to read port %d counters: %d\n",
|
|
port, rc);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void sja1105_get_strings(struct dsa_switch *ds, int port,
|
|
u32 stringset, u8 *data)
|
|
{
|
|
struct sja1105_private *priv = ds->priv;
|
|
enum sja1105_counter_index max_ctr, i;
|
|
char *p = data;
|
|
|
|
if (stringset != ETH_SS_STATS)
|
|
return;
|
|
|
|
if (priv->info->device_id == SJA1105E_DEVICE_ID ||
|
|
priv->info->device_id == SJA1105T_DEVICE_ID)
|
|
max_ctr = __MAX_SJA1105ET_PORT_COUNTER;
|
|
else
|
|
max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;
|
|
|
|
for (i = 0; i < max_ctr; i++) {
|
|
strscpy(p, sja1105_port_counters[i].name, ETH_GSTRING_LEN);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
}
|
|
|
|
int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset)
|
|
{
|
|
struct sja1105_private *priv = ds->priv;
|
|
enum sja1105_counter_index max_ctr, i;
|
|
int sset_count = 0;
|
|
|
|
if (sset != ETH_SS_STATS)
|
|
return -EOPNOTSUPP;
|
|
|
|
if (priv->info->device_id == SJA1105E_DEVICE_ID ||
|
|
priv->info->device_id == SJA1105T_DEVICE_ID)
|
|
max_ctr = __MAX_SJA1105ET_PORT_COUNTER;
|
|
else
|
|
max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;
|
|
|
|
for (i = 0; i < max_ctr; i++) {
|
|
if (!strlen(sja1105_port_counters[i].name))
|
|
continue;
|
|
|
|
sset_count++;
|
|
}
|
|
|
|
return sset_count;
|
|
}
|