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fadbafc1b7
Add a driver for the CPU pll/ARM pll/MIPS pll that is present in MStar SoCs. Currently there is no documentation for this block so it's possible this driver isn't entirely correct. Only tested on the version of this IP in the MStar/SigmaStar ARMv7 SoCs. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Co-developed-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Romain Perier <romain.perier@gmail.com> Link: https://lore.kernel.org/r/20221022133404.3832-2-romain.perier@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
17 lines
448 B
Plaintext
17 lines
448 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config MSTAR_MSC313_CPUPLL
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bool "MStar CPUPLL driver"
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depends on ARCH_MSTARV7 || COMPILE_TEST
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default ARCH_MSTARV7
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help
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Support for the CPU PLL present on MStar/Sigmastar SoCs.
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config MSTAR_MSC313_MPLL
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bool "MStar MPLL driver"
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depends on ARCH_MSTARV7 || COMPILE_TEST
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default ARCH_MSTARV7
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select REGMAP_MMIO
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help
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Support for the MPLL PLL and dividers block present on
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MStar/Sigmastar SoCs.
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