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The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. This driver provides the basic timer functionnality as a backup for the local timers at sleep time. The timer belongs to the alive subsystem. It includes two programmables 64 bits timer channels but the driver only uses 32bits. It works with two operations mode: free running and user defined count. Programing sequence: 1. Timer initialization: * Disable the timer by writing '0' to the CONTROLREG register * Program the timer mode by writing the mode to the CONTROLREG register * Set the interrupt mask 2. Setting the count value: * Load the count value to the registers COUNT0 and COUNT1 (not used). 3. Enable the timer * Write '1' to the CONTROLREG register with the mode (free running or user) Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
20 lines
553 B
Plaintext
20 lines
553 B
Plaintext
config ARCH_ROCKCHIP
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bool "Rockchip RK2928 and RK3xxx SOCs" if ARCH_MULTI_V7
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select PINCTRL
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select PINCTRL_ROCKCHIP
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select ARCH_HAS_RESET_CONTROLLER
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select ARCH_REQUIRE_GPIOLIB
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select ARM_AMBA
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select ARM_GIC
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select CACHE_L2X0
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select HAVE_ARM_ARCH_TIMER
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select DW_APB_TIMER_OF
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select ROCKCHIP_TIMER
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select ARM_GLOBAL_TIMER
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select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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help
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Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
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containing the RK2928, RK30xx and RK31xx series.
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