mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
f197b2c54b
This simplifies the OHCI root hub suspend logic: - Uses new usbcore root hub calls to make autosuspend work again: * Uses a newish usbcore root hub wakeup mechanism, making requests to khubd not keventd. * Uses an even newer sibling suspend hook. - Expect someone always made usbcore call ohci_hub_suspend() before bus glue fires; and that ohci_hub_resume() is only called after that bus glue ran. Previously, only CONFIG_USB_SUSPEND promised those things. (Includes updates to PCI and OMAP bus glue.) - Handle a not-noticed-before special case during resume from one of the swsusp snapshots when using "usb-handoff": the controller isn't left in RESET state. (A bug to fix in the usb-handoff code...) Also cleans up a minor debug printk glitch, and switches an mdelay over to an msleep (how did that stick around for so long?). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/usb/host/ohci-dbg.c | 4 ---- drivers/usb/host/ohci-hcd.c | 2 +- drivers/usb/host/ohci-hub.c | 42 ++++++++++++------------------------------ drivers/usb/host/ohci-mem.c | 1 - drivers/usb/host/ohci-omap.c | 36 ++++++++++++------------------------ drivers/usb/host/ohci-pci.c | 40 ++++++++-------------------------------- drivers/usb/host/ohci.h | 1 - 7 files changed, 33 insertions(+), 93 deletions(-)
139 lines
3.4 KiB
C
139 lines
3.4 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
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*
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* This file is licenced under the GPL.
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*/
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/*-------------------------------------------------------------------------*/
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/*
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* There's basically three types of memory:
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* - data used only by the HCD ... kmalloc is fine
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* - async and periodic schedules, shared by HC and HCD ... these
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* need to use dma_pool or dma_alloc_coherent
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* - driver buffers, read/written by HC ... the hcd glue or the
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* device driver provides us with dma addresses
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*
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* There's also PCI "register" data, which is memory mapped.
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* No memory seen by this driver is pagable.
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*/
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/*-------------------------------------------------------------------------*/
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static void ohci_hcd_init (struct ohci_hcd *ohci)
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{
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ohci->next_statechange = jiffies;
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spin_lock_init (&ohci->lock);
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INIT_LIST_HEAD (&ohci->pending);
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ohci->reboot_notifier.notifier_call = ohci_reboot;
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}
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/*-------------------------------------------------------------------------*/
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static int ohci_mem_init (struct ohci_hcd *ohci)
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{
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ohci->td_cache = dma_pool_create ("ohci_td",
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ohci_to_hcd(ohci)->self.controller,
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sizeof (struct td),
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32 /* byte alignment */,
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0 /* no page-crossing issues */);
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if (!ohci->td_cache)
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return -ENOMEM;
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ohci->ed_cache = dma_pool_create ("ohci_ed",
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ohci_to_hcd(ohci)->self.controller,
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sizeof (struct ed),
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16 /* byte alignment */,
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0 /* no page-crossing issues */);
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if (!ohci->ed_cache) {
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dma_pool_destroy (ohci->td_cache);
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return -ENOMEM;
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}
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return 0;
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}
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static void ohci_mem_cleanup (struct ohci_hcd *ohci)
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{
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if (ohci->td_cache) {
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dma_pool_destroy (ohci->td_cache);
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ohci->td_cache = NULL;
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}
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if (ohci->ed_cache) {
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dma_pool_destroy (ohci->ed_cache);
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ohci->ed_cache = NULL;
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}
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}
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/*-------------------------------------------------------------------------*/
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/* ohci "done list" processing needs this mapping */
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static inline struct td *
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dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma)
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{
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struct td *td;
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td_dma &= TD_MASK;
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td = hc->td_hash [TD_HASH_FUNC(td_dma)];
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while (td && td->td_dma != td_dma)
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td = td->td_hash;
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return td;
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}
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/* TDs ... */
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static struct td *
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td_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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{
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dma_addr_t dma;
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struct td *td;
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td = dma_pool_alloc (hc->td_cache, mem_flags, &dma);
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if (td) {
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/* in case hc fetches it, make it look dead */
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memset (td, 0, sizeof *td);
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td->hwNextTD = cpu_to_hc32 (hc, dma);
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td->td_dma = dma;
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/* hashed in td_fill */
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}
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return td;
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}
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static void
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td_free (struct ohci_hcd *hc, struct td *td)
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{
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struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)];
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while (*prev && *prev != td)
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prev = &(*prev)->td_hash;
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if (*prev)
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*prev = td->td_hash;
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else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0)
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ohci_dbg (hc, "no hash for td %p\n", td);
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dma_pool_free (hc->td_cache, td, td->td_dma);
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}
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/*-------------------------------------------------------------------------*/
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/* EDs ... */
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static struct ed *
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ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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{
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dma_addr_t dma;
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struct ed *ed;
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ed = dma_pool_alloc (hc->ed_cache, mem_flags, &dma);
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if (ed) {
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memset (ed, 0, sizeof (*ed));
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INIT_LIST_HEAD (&ed->td_list);
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ed->dma = dma;
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}
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return ed;
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}
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static void
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ed_free (struct ohci_hcd *hc, struct ed *ed)
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{
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dma_pool_free (hc->ed_cache, ed, ed->dma);
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}
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