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fcba914542
This is the third and smallest of the SoC specific updates.
Changes include:
* SMP support for the Xilinx zynq platform
* Smaller imx changes
* LPAE support for mvebu
* Moving the orion5x, kirkwood, dove and mvebu platforms
to a common "mbus" driver for their internal devices.
It would be good to get feedback on the location of the "mbus"
driver. Since this is used on multiple platforms may potentially
get shared with other architectures (powerpc and arm64), it
was moved to drivers/bus/. We expect other similar drivers to
get moved to the same place in order to avoid creating more
top-level directories under drivers/ or cluttering up the
messy drivers/misc/ even more.
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Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates (part 3) from Arnd Bergmann:
"This is the third and smallest of the SoC specific updates. Changes
include:
- SMP support for the Xilinx zynq platform
- Smaller imx changes
- LPAE support for mvebu
- Moving the orion5x, kirkwood, dove and mvebu platforms to a common
"mbus" driver for their internal devices.
It would be good to get feedback on the location of the "mbus" driver.
Since this is used on multiple platforms may potentially get shared
with other architectures (powerpc and arm64), it was moved to
drivers/bus/. We expect other similar drivers to get moved to the
same place in order to avoid creating more top-level directories under
drivers/ or cluttering up the messy drivers/misc/ even more."
* tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
ARM: imx: reset_controller may be disabled
ARM: mvebu: Align the internal registers virtual base to support LPAE
ARM: mvebu: Limit the DMA zone when LPAE is selected
arm: plat-orion: remove addr-map code
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
arm: mach-orion5x: convert to use mvebu-mbus driver
arm: mach-dove: convert to use mvebu-mbus driver
arm: mach-kirkwood: convert to use mvebu-mbus driver
arm: mach-mvebu: convert to use mvebu-mbus driver
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
ARM i.MX53: make tve_ext_sel propagate rate change to PLL
ARM i.MX53: Remove unused tve_gate clkdev entry
ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
ARM: i.MX5: Add PATA and SRTC clocks
ARM: imx: do not bring up unavailable cores
ARM: imx: add initial imx6dl support
ARM: imx1: mm: add call to mxc_device_init
ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
...
231 lines
4.9 KiB
Plaintext
231 lines
4.9 KiB
Plaintext
/*
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* Device Tree Include file for Marvell Armada 370 and Armada XP SoC
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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* Ben Dooks <ben.dooks@codethink.co.uk>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* This file contains the definitions that are common to the Armada
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* 370 and Armada XP SoC.
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*/
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/include/ "skeleton64.dtsi"
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/ {
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model = "Marvell Armada 370 and XP SoC";
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compatible = "marvell,armada-370-xp";
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cpus {
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cpu@0 {
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compatible = "marvell,sheeva-v7";
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&mpic>;
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ranges = <0 0 0xd0000000 0x100000>;
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internal-regs {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mpic: interrupt-controller@20000 {
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compatible = "marvell,mpic";
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#interrupt-cells = <1>;
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#size-cells = <1>;
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interrupt-controller;
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};
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coherency-fabric@20200 {
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compatible = "marvell,coherency-fabric";
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reg = <0x20200 0xb0>, <0x21810 0x1c>;
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};
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serial@12000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x12000 0x100>;
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reg-shift = <2>;
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interrupts = <41>;
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reg-io-width = <1>;
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status = "disabled";
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};
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serial@12100 {
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compatible = "snps,dw-apb-uart";
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reg = <0x12100 0x100>;
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reg-shift = <2>;
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interrupts = <42>;
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reg-io-width = <1>;
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status = "disabled";
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};
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timer@20300 {
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compatible = "marvell,armada-370-xp-timer";
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reg = <0x20300 0x30>, <0x21040 0x30>;
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interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
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clocks = <&coreclk 2>;
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};
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sata@a0000 {
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compatible = "marvell,orion-sata";
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reg = <0xa0000 0x2400>;
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interrupts = <55>;
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clocks = <&gateclk 15>, <&gateclk 30>;
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clock-names = "0", "1";
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status = "disabled";
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,orion-mdio";
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reg = <0x72004 0x4>;
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};
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ethernet@70000 {
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compatible = "marvell,armada-370-neta";
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reg = <0x70000 0x2500>;
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interrupts = <8>;
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clocks = <&gateclk 4>;
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status = "disabled";
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};
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ethernet@74000 {
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compatible = "marvell,armada-370-neta";
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reg = <0x74000 0x2500>;
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interrupts = <10>;
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clocks = <&gateclk 3>;
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status = "disabled";
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};
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i2c0: i2c@11000 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0x11000 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <31>;
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timeout-ms = <1000>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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i2c1: i2c@11100 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0x11100 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <32>;
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timeout-ms = <1000>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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rtc@10300 {
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compatible = "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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interrupts = <50>;
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};
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mvsdio@d4000 {
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compatible = "marvell,orion-sdio";
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reg = <0xd4000 0x200>;
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interrupts = <54>;
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clocks = <&gateclk 17>;
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status = "disabled";
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};
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usb@50000 {
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compatible = "marvell,orion-ehci";
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reg = <0x50000 0x500>;
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interrupts = <45>;
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status = "disabled";
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};
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usb@51000 {
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compatible = "marvell,orion-ehci";
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reg = <0x51000 0x500>;
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interrupts = <46>;
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status = "disabled";
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};
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spi0: spi@10600 {
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compatible = "marvell,orion-spi";
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reg = <0x10600 0x28>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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interrupts = <30>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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spi1: spi@10680 {
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compatible = "marvell,orion-spi";
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reg = <0x10680 0x28>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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interrupts = <92>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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devbus-bootcs@10400 {
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compatible = "marvell,mvebu-devbus";
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reg = <0x10400 0x8>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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devbus-cs0@10408 {
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compatible = "marvell,mvebu-devbus";
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reg = <0x10408 0x8>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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devbus-cs1@10410 {
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compatible = "marvell,mvebu-devbus";
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reg = <0x10410 0x8>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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devbus-cs2@10418 {
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compatible = "marvell,mvebu-devbus";
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reg = <0x10418 0x8>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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devbus-cs3@10420 {
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compatible = "marvell,mvebu-devbus";
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reg = <0x10420 0x8>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&coreclk 0>;
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status = "disabled";
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};
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};
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};
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};
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