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481d97ba61
Add support for the RK3588 to the driver. The RK3588 has four DDR channels with a register stride of 0x4000 between the channel registers, also it has a DDRMON_CTRL register per channel. Link: https://lore.kernel.org/all/20231018061714.3553817-20-s.hauer@pengutronix.de/ Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
19 lines
680 B
C
19 lines
680 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef __SOC_RK3588_GRF_H
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#define __SOC_RK3588_GRF_H
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#define RK3588_PMUGRF_OS_REG2 0x208
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#define RK3588_PMUGRF_OS_REG2_DRAMTYPE_INFO GENMASK(15, 13)
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#define RK3588_PMUGRF_OS_REG2_BW_CH0 GENMASK(3, 2)
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#define RK3588_PMUGRF_OS_REG2_BW_CH1 GENMASK(19, 18)
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#define RK3588_PMUGRF_OS_REG2_CH_INFO GENMASK(29, 28)
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#define RK3588_PMUGRF_OS_REG3 0x20c
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#define RK3588_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3 GENMASK(13, 12)
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#define RK3588_PMUGRF_OS_REG3_SYSREG_VERSION GENMASK(31, 28)
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#define RK3588_PMUGRF_OS_REG4 0x210
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#define RK3588_PMUGRF_OS_REG5 0x214
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#endif /* __SOC_RK3588_GRF_H */
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