Romain Perier 3bba75a2ec clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188 ... Now that the rockchip clock subsystem does clock gating with GPIO banks, these are no longer enabled once during probe and no longer stay enabled for eternity. When all these clocks are disabled, the parent clock pclk_peri might be disabled too, as no other child claims it. So, we need to add pclk_peri to the critical clocks. Signed-off-by: Romain Perier <romain.perier@gmail.com> Tested-by: Michael Niewoehner <linux@mniewoehner.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2015-09-10 13:55:30 -07:00
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clk-cpu.c	clk: rockchip: Properly include clk.h	2015-07-20 11:11:10 -07:00
clk-inverter.c	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	2015-08-24 16:49:12 -07:00
clk-mmc-phase.c	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	2015-08-24 16:49:12 -07:00
clk-pll.c	clk: rockchip: register pll mux before pll itself	2015-08-24 16:49:15 -07:00
clk-rk3188.c	clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188	2015-09-10 13:55:30 -07:00
clk-rk3288.c	clk: rockchip: Fix PLL bandwidth	2015-07-28 11:59:12 -07:00
clk-rk3368.c	clk: rockchip: add rk3368 clock controller	2015-07-06 15:09:22 -07:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	clk: rockchip: add support for phase inverters	2015-07-06 15:04:40 -07:00
clk.h	clk: rockchip: Fix PLL bandwidth	2015-07-28 11:59:12 -07:00
Makefile	clk: rockchip: add rk3368 clock controller	2015-07-06 15:09:22 -07:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00