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linux/arch/arm/mach-ux500
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Rabin Vincent 38bdbf020a ste_dma40: move channel mode to a separate field 
And keep it logical by default.

Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-10-19 15:17:07 -07:00
..
include/mach Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx 2010-08-09 21:00:07 -07:00
board-mop500.c ARM: 6267/1: mop500: add AB8500 interrupt support 2010-07-27 08:28:32 +01:00
board-u5500.c ARM: 6090/1: ux500: add U5500 support 2010-05-04 17:50:06 +01:00
clock.c ARM: AMBA: Add pclk definition for platforms using primecells 2010-07-22 09:55:38 +01:00
clock.h ARM: 6145/1: ux500 MTU clockrate correction 2010-05-27 10:36:08 +01:00
cpu-db5500.c ARM: 6184/2: ux500: use neutral PRCMU base 2010-07-09 14:46:47 +01:00
cpu-db8500.c DMAENGINE: DMA40 U8500 platform configuration 2010-05-27 15:21:26 -07:00
cpu.c ARM: 6145/1: ux500 MTU clockrate correction 2010-05-27 10:36:08 +01:00
devices-db5500.c ARM: 6090/1: ux500: add U5500 support 2010-05-04 17:50:06 +01:00
devices-db8500.c ste_dma40: move channel mode to a separate field 2010-10-19 15:17:07 -07:00
devices.c ARM: 6085/1: ux500: reorganize i2c devices 2010-05-04 17:50:04 +01:00
headsmp.S ARM: 5831/1: ARM: U8500 core machine support 2009-11-28 10:22:52 +00:00
Kconfig ARM: 6090/1: ux500: add U5500 support 2010-05-04 17:50:06 +01:00
localtimer.c ARM: 5831/1: ARM: U8500 core machine support 2009-11-28 10:22:52 +00:00
Makefile ARM: 6152/1: ux500 make it possible to disable localtimers 2010-06-08 19:25:49 +01:00
Makefile.boot ARM: 5832/1: ARM: U8500 Makefile.boot 2009-11-28 10:22:52 +00:00
pins-db8500.h ARM: 6160/1: ux500: add DB8500 pin configs 2010-06-16 22:30:48 +01:00
platsmp.c ARM: 6088/1: ux500: use UX500_* macros instead of U8500_* 2010-05-04 17:50:05 +01:00
ste-dma40-db8500.h DMAENGINE: ste_dma40: add DB8500 memcpy channels 2010-06-22 18:01:56 -07:00