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36386d6e54
The port controller needs the apb0_pio clock enabled to be able to work. This commit declares that on the device tree. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
47 lines
1,013 B
Plaintext
47 lines
1,013 B
Plaintext
/*
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* Copyright 2012 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "sunxi.dtsi"
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/ {
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memory {
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reg = <0x40000000 0x20000000>;
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};
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soc {
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pio: pinctrl@01c20800 {
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compatible = "allwinner,sun5i-a13-pinctrl";
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reg = <0x01c20800 0x400>;
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clocks = <&apb0_gates 5>;
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gpio-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#gpio-cells = <3>;
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uart1_pins_a: uart1@0 {
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allwinner,pins = "PE10", "PE11";
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allwinner,function = "uart1";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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uart1_pins_b: uart1@1 {
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allwinner,pins = "PG3", "PG4";
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allwinner,function = "uart1";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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};
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};
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};
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