Sudeep Holla 7934d69abf arm64: Add L2 cache topology to ARM Ltd boards/models ... Commit 5d425c1865 ("arm64: kernel: add support for cpu cache information") adds cacheinfo support for ARM64. Since there's no architectural way of detecting the cpus that share particular cache, device tree can be used and the core cacheinfo already supports the same. This patch adds the L2 cache topology on Juno board, FVP/RTSM and foundation models. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Liviu Dudau <Liviu.Dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2015-02-25 17:12:21 +01:00
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dts	arm64: Add L2 cache topology to ARM Ltd boards/models	2015-02-25 17:12:21 +01:00
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