linux/arch/riscv
Bin Meng fc26f5bbf1
riscv: Add SiFive drivers to rv32_defconfig
This adds SiFive drivers to rv32_defconfig, to keep in sync with the
64-bit config. This is useful when testing 32-bit kernel with QEMU
'sifive_u' 32-bit machine.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-08-20 11:00:21 -07:00
..
boot riscv: Allow building with kcov coverage 2020-07-30 11:37:35 -07:00
configs riscv: Add SiFive drivers to rv32_defconfig 2020-08-20 11:00:21 -07:00
include RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
kernel RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
lib RISC-V Patches for the 5.7 Merge Window, Part 1 2020-04-09 10:51:30 -07:00
mm mm/riscv: use general page fault accounting 2020-08-12 10:58:03 -07:00
net bpf, riscv: Use compressed instructions in the rv64 JIT 2020-07-21 13:26:25 -07:00
Kbuild riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
Kconfig RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
Makefile RISC-V Patches for the 5.7 Merge Window, Part 1 2020-04-09 10:51:30 -07:00