Jim Lin 2cfe16748b clk: tegra: Enable hardware control of PLLE ... Enable hardware control of PLLE spread-spectrum, IDDQ, and enable controls when enabling PLLE. The hardware (e.g. XUSB) using PLLE will use these controls for power-saving optimizations. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2014-05-22 22:14:51 -07:00
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at91
bcm
hisilicon
keystone
mmp	clk: mmp: try to use closer one when do round rate	2014-03-26 20:59:27 -07:00
mvebu
mxs
qcom	clk: qcom: Fix msm8660 GCC probe	2014-05-16 16:53:07 -07:00
rockchip
samsung
shmobile	clk: shmobile: mstp: Fix the is_enabled() operation	2014-05-22 19:03:03 -07:00
sirf
socfpga	Adds support getting the divider registers for the MAIN PLL that was once	2014-05-12 19:11:13 -07:00
spear
st
sunxi	clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk	2014-05-14 16:58:21 -07:00
tegra	clk: tegra: Enable hardware control of PLLE	2014-05-22 22:14:51 -07:00
ti
ux500
versatile	clk: impd1: add pclk clocks	2014-05-21 16:16:02 -07:00
x86
zynq	clk: zynq: Leave debug clocks in bootup state	2014-04-22 13:10:18 +02:00
clk-axi-clkgen.c
clk-axm5516.c	clk: Add clock driver for AXM55xx SoC	2014-05-22 22:06:14 -07:00
clk-bcm2835.c
clk-composite.c
clk-devres.c
clk-divider.c
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-gate.c
clk-highbank.c
clk-ls1x.c
clk-max77686.c
clk-moxart.c
clk-mux.c
clk-nomadik.c
clk-nspire.c
clk-ppc-corenet.c
clk-s2mps11.c
clk-si570.c	clk: si570: Fix email address specifiction	2014-05-20 16:18:18 +02:00
clk-si5351.c
clk-si5351.h
clk-twl6040.c
clk-u300.c
clk-vt8500.c	clk: vt8500: Staticize vtwm_pll_ops	2013-12-19 17:47:32 -08:00
clk-wm831x.c
clk-xgene.c
clk.c
clk.h	clk: Add of_clk_get_by_clkspec() helper	2014-05-22 15:54:59 -07:00
clkdev.c	clk: Add of_clk_get_by_clkspec() helper	2014-05-22 15:54:59 -07:00
Kconfig
Makefile	clk: Add clock driver for AXM55xx SoC	2014-05-22 22:06:14 -07:00