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drivers/hwmon/jc42.c:521:1-3: WARNING: PTR_RET can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: coccinelle/api/ptr_ret.cocci CC: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
591 lines
16 KiB
C
591 lines
16 KiB
C
/*
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* jc42.c - driver for Jedec JC42.4 compliant temperature sensors
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*
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* Copyright (c) 2010 Ericsson AB.
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*
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* Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
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*
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* JC42.4 compliant temperature sensors are typically used on memory modules.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/jiffies.h>
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#include <linux/i2c.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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/* Addresses to scan */
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static const unsigned short normal_i2c[] = {
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0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
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/* JC42 registers. All registers are 16 bit. */
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#define JC42_REG_CAP 0x00
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#define JC42_REG_CONFIG 0x01
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#define JC42_REG_TEMP_UPPER 0x02
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#define JC42_REG_TEMP_LOWER 0x03
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#define JC42_REG_TEMP_CRITICAL 0x04
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#define JC42_REG_TEMP 0x05
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#define JC42_REG_MANID 0x06
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#define JC42_REG_DEVICEID 0x07
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/* Status bits in temperature register */
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#define JC42_ALARM_CRIT_BIT 15
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#define JC42_ALARM_MAX_BIT 14
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#define JC42_ALARM_MIN_BIT 13
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/* Configuration register defines */
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#define JC42_CFG_CRIT_ONLY (1 << 2)
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#define JC42_CFG_TCRIT_LOCK (1 << 6)
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#define JC42_CFG_EVENT_LOCK (1 << 7)
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#define JC42_CFG_SHUTDOWN (1 << 8)
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#define JC42_CFG_HYST_SHIFT 9
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#define JC42_CFG_HYST_MASK (0x03 << 9)
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/* Capabilities */
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#define JC42_CAP_RANGE (1 << 2)
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/* Manufacturer IDs */
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#define ADT_MANID 0x11d4 /* Analog Devices */
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#define ATMEL_MANID 0x001f /* Atmel */
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#define MAX_MANID 0x004d /* Maxim */
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#define IDT_MANID 0x00b3 /* IDT */
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#define MCP_MANID 0x0054 /* Microchip */
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#define NXP_MANID 0x1131 /* NXP Semiconductors */
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#define ONS_MANID 0x1b09 /* ON Semiconductor */
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#define STM_MANID 0x104a /* ST Microelectronics */
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/* Supported chips */
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/* Analog Devices */
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#define ADT7408_DEVID 0x0801
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#define ADT7408_DEVID_MASK 0xffff
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/* Atmel */
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#define AT30TS00_DEVID 0x8201
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#define AT30TS00_DEVID_MASK 0xffff
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/* IDT */
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#define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
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#define TS3000B3_DEVID_MASK 0xffff
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#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
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#define TS3000GB2_DEVID_MASK 0xffff
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/* Maxim */
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#define MAX6604_DEVID 0x3e00
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#define MAX6604_DEVID_MASK 0xffff
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/* Microchip */
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#define MCP9804_DEVID 0x0200
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#define MCP9804_DEVID_MASK 0xfffc
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#define MCP98242_DEVID 0x2000
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#define MCP98242_DEVID_MASK 0xfffc
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#define MCP98243_DEVID 0x2100
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#define MCP98243_DEVID_MASK 0xfffc
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#define MCP98244_DEVID 0x2200
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#define MCP98244_DEVID_MASK 0xfffc
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#define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
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#define MCP9843_DEVID_MASK 0xfffe
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/* NXP */
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#define SE97_DEVID 0xa200
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#define SE97_DEVID_MASK 0xfffc
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#define SE98_DEVID 0xa100
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#define SE98_DEVID_MASK 0xfffc
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/* ON Semiconductor */
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#define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
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#define CAT6095_DEVID_MASK 0xffe0
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/* ST Microelectronics */
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#define STTS424_DEVID 0x0101
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#define STTS424_DEVID_MASK 0xffff
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#define STTS424E_DEVID 0x0000
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#define STTS424E_DEVID_MASK 0xfffe
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#define STTS2002_DEVID 0x0300
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#define STTS2002_DEVID_MASK 0xffff
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#define STTS3000_DEVID 0x0200
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#define STTS3000_DEVID_MASK 0xffff
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static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
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struct jc42_chips {
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u16 manid;
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u16 devid;
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u16 devid_mask;
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};
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static struct jc42_chips jc42_chips[] = {
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{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
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{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
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{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
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{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
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{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
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{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
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{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
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{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
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{ MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
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{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
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{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
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{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
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{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
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{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
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{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
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{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
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{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
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};
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/* Each client has this additional data */
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struct jc42_data {
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struct i2c_client *client;
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struct mutex update_lock; /* protect register access */
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bool extended; /* true if extended range supported */
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bool valid;
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unsigned long last_updated; /* In jiffies */
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u16 orig_config; /* original configuration */
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u16 config; /* current configuration */
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u16 temp_input; /* Temperatures */
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u16 temp_crit;
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u16 temp_min;
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u16 temp_max;
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};
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static int jc42_probe(struct i2c_client *client,
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const struct i2c_device_id *id);
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static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
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static int jc42_remove(struct i2c_client *client);
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static struct jc42_data *jc42_update_device(struct device *dev);
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static const struct i2c_device_id jc42_id[] = {
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{ "jc42", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, jc42_id);
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#ifdef CONFIG_PM
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static int jc42_suspend(struct device *dev)
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{
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struct jc42_data *data = dev_get_drvdata(dev);
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data->config |= JC42_CFG_SHUTDOWN;
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i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
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data->config);
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return 0;
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}
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static int jc42_resume(struct device *dev)
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{
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struct jc42_data *data = dev_get_drvdata(dev);
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data->config &= ~JC42_CFG_SHUTDOWN;
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i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
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data->config);
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return 0;
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}
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static const struct dev_pm_ops jc42_dev_pm_ops = {
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.suspend = jc42_suspend,
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.resume = jc42_resume,
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};
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#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
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#else
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#define JC42_DEV_PM_OPS NULL
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#endif /* CONFIG_PM */
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/* This is the driver that will be inserted */
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static struct i2c_driver jc42_driver = {
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.class = I2C_CLASS_SPD,
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.driver = {
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.name = "jc42",
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.pm = JC42_DEV_PM_OPS,
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},
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.probe = jc42_probe,
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.remove = jc42_remove,
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.id_table = jc42_id,
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.detect = jc42_detect,
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.address_list = normal_i2c,
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};
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#define JC42_TEMP_MIN_EXTENDED (-40000)
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#define JC42_TEMP_MIN 0
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#define JC42_TEMP_MAX 125000
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static u16 jc42_temp_to_reg(int temp, bool extended)
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{
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int ntemp = clamp_val(temp,
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extended ? JC42_TEMP_MIN_EXTENDED :
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JC42_TEMP_MIN, JC42_TEMP_MAX);
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/* convert from 0.001 to 0.0625 resolution */
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return (ntemp * 2 / 125) & 0x1fff;
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}
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static int jc42_temp_from_reg(s16 reg)
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{
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reg &= 0x1fff;
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/* sign extend register */
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if (reg & 0x1000)
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reg |= 0xf000;
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/* convert from 0.0625 to 0.001 resolution */
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return reg * 125 / 2;
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}
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/* sysfs stuff */
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/* read routines for temperature limits */
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#define show(value) \
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static ssize_t show_##value(struct device *dev, \
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struct device_attribute *attr, \
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char *buf) \
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{ \
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struct jc42_data *data = jc42_update_device(dev); \
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if (IS_ERR(data)) \
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return PTR_ERR(data); \
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return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
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}
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show(temp_input);
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show(temp_crit);
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show(temp_min);
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show(temp_max);
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/* read routines for hysteresis values */
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static ssize_t show_temp_crit_hyst(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct jc42_data *data = jc42_update_device(dev);
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int temp, hyst;
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if (IS_ERR(data))
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return PTR_ERR(data);
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temp = jc42_temp_from_reg(data->temp_crit);
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hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
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>> JC42_CFG_HYST_SHIFT];
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return sprintf(buf, "%d\n", temp - hyst);
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}
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static ssize_t show_temp_max_hyst(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct jc42_data *data = jc42_update_device(dev);
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int temp, hyst;
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if (IS_ERR(data))
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return PTR_ERR(data);
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temp = jc42_temp_from_reg(data->temp_max);
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hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
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>> JC42_CFG_HYST_SHIFT];
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return sprintf(buf, "%d\n", temp - hyst);
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}
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/* write routines */
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#define set(value, reg) \
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static ssize_t set_##value(struct device *dev, \
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struct device_attribute *attr, \
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const char *buf, size_t count) \
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{ \
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struct jc42_data *data = dev_get_drvdata(dev); \
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int err, ret = count; \
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long val; \
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if (kstrtol(buf, 10, &val) < 0) \
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return -EINVAL; \
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mutex_lock(&data->update_lock); \
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data->value = jc42_temp_to_reg(val, data->extended); \
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err = i2c_smbus_write_word_swapped(data->client, reg, data->value); \
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if (err < 0) \
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ret = err; \
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mutex_unlock(&data->update_lock); \
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return ret; \
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}
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set(temp_min, JC42_REG_TEMP_LOWER);
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set(temp_max, JC42_REG_TEMP_UPPER);
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set(temp_crit, JC42_REG_TEMP_CRITICAL);
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/*
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* JC42.4 compliant chips only support four hysteresis values.
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* Pick best choice and go from there.
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*/
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static ssize_t set_temp_crit_hyst(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct jc42_data *data = dev_get_drvdata(dev);
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unsigned long val;
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int diff, hyst;
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int err;
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int ret = count;
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if (kstrtoul(buf, 10, &val) < 0)
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return -EINVAL;
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diff = jc42_temp_from_reg(data->temp_crit) - val;
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hyst = 0;
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if (diff > 0) {
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if (diff < 2250)
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hyst = 1; /* 1.5 degrees C */
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else if (diff < 4500)
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hyst = 2; /* 3.0 degrees C */
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else
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hyst = 3; /* 6.0 degrees C */
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}
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mutex_lock(&data->update_lock);
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data->config = (data->config & ~JC42_CFG_HYST_MASK)
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| (hyst << JC42_CFG_HYST_SHIFT);
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err = i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
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data->config);
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if (err < 0)
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ret = err;
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mutex_unlock(&data->update_lock);
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return ret;
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}
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static ssize_t show_alarm(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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u16 bit = to_sensor_dev_attr(attr)->index;
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struct jc42_data *data = jc42_update_device(dev);
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u16 val;
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if (IS_ERR(data))
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return PTR_ERR(data);
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val = data->temp_input;
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if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
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val = 0;
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return sprintf(buf, "%u\n", (val >> bit) & 1);
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}
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static DEVICE_ATTR(temp1_input, S_IRUGO,
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show_temp_input, NULL);
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static DEVICE_ATTR(temp1_crit, S_IRUGO,
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show_temp_crit, set_temp_crit);
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static DEVICE_ATTR(temp1_min, S_IRUGO,
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show_temp_min, set_temp_min);
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static DEVICE_ATTR(temp1_max, S_IRUGO,
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show_temp_max, set_temp_max);
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static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
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show_temp_crit_hyst, set_temp_crit_hyst);
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static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
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show_temp_max_hyst, NULL);
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static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
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JC42_ALARM_CRIT_BIT);
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static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
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JC42_ALARM_MIN_BIT);
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static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
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JC42_ALARM_MAX_BIT);
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static struct attribute *jc42_attributes[] = {
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&dev_attr_temp1_input.attr,
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&dev_attr_temp1_crit.attr,
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&dev_attr_temp1_min.attr,
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&dev_attr_temp1_max.attr,
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&dev_attr_temp1_crit_hyst.attr,
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&dev_attr_temp1_max_hyst.attr,
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&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
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&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
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&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
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NULL
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};
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static umode_t jc42_attribute_mode(struct kobject *kobj,
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struct attribute *attr, int index)
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{
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struct device *dev = container_of(kobj, struct device, kobj);
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struct jc42_data *data = dev_get_drvdata(dev);
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unsigned int config = data->config;
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bool readonly;
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if (attr == &dev_attr_temp1_crit.attr)
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readonly = config & JC42_CFG_TCRIT_LOCK;
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else if (attr == &dev_attr_temp1_min.attr ||
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attr == &dev_attr_temp1_max.attr)
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readonly = config & JC42_CFG_EVENT_LOCK;
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else if (attr == &dev_attr_temp1_crit_hyst.attr)
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readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
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else
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readonly = true;
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return S_IRUGO | (readonly ? 0 : S_IWUSR);
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}
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static const struct attribute_group jc42_group = {
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.attrs = jc42_attributes,
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.is_visible = jc42_attribute_mode,
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};
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__ATTRIBUTE_GROUPS(jc42);
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/* Return 0 if detection is successful, -ENODEV otherwise */
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static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
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{
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struct i2c_adapter *adapter = client->adapter;
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int i, config, cap, manid, devid;
|
|
|
|
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
|
|
I2C_FUNC_SMBUS_WORD_DATA))
|
|
return -ENODEV;
|
|
|
|
cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
|
|
config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
|
|
manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
|
|
devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
|
|
|
|
if (cap < 0 || config < 0 || manid < 0 || devid < 0)
|
|
return -ENODEV;
|
|
|
|
if ((cap & 0xff00) || (config & 0xf800))
|
|
return -ENODEV;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
|
|
struct jc42_chips *chip = &jc42_chips[i];
|
|
if (manid == chip->manid &&
|
|
(devid & chip->devid_mask) == chip->devid) {
|
|
strlcpy(info->type, "jc42", I2C_NAME_SIZE);
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENODEV;
|
|
}
|
|
|
|
static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
struct device *hwmon_dev;
|
|
struct jc42_data *data;
|
|
int config, cap;
|
|
|
|
data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
data->client = client;
|
|
i2c_set_clientdata(client, data);
|
|
mutex_init(&data->update_lock);
|
|
|
|
cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
|
|
if (cap < 0)
|
|
return cap;
|
|
|
|
data->extended = !!(cap & JC42_CAP_RANGE);
|
|
|
|
config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
|
|
if (config < 0)
|
|
return config;
|
|
|
|
data->orig_config = config;
|
|
if (config & JC42_CFG_SHUTDOWN) {
|
|
config &= ~JC42_CFG_SHUTDOWN;
|
|
i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
|
|
}
|
|
data->config = config;
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
|
|
data,
|
|
jc42_groups);
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
|
}
|
|
|
|
static int jc42_remove(struct i2c_client *client)
|
|
{
|
|
struct jc42_data *data = i2c_get_clientdata(client);
|
|
|
|
/* Restore original configuration except hysteresis */
|
|
if ((data->config & ~JC42_CFG_HYST_MASK) !=
|
|
(data->orig_config & ~JC42_CFG_HYST_MASK)) {
|
|
int config;
|
|
|
|
config = (data->orig_config & ~JC42_CFG_HYST_MASK)
|
|
| (data->config & JC42_CFG_HYST_MASK);
|
|
i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct jc42_data *jc42_update_device(struct device *dev)
|
|
{
|
|
struct jc42_data *data = dev_get_drvdata(dev);
|
|
struct i2c_client *client = data->client;
|
|
struct jc42_data *ret = data;
|
|
int val;
|
|
|
|
mutex_lock(&data->update_lock);
|
|
|
|
if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
|
|
val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
|
|
if (val < 0) {
|
|
ret = ERR_PTR(val);
|
|
goto abort;
|
|
}
|
|
data->temp_input = val;
|
|
|
|
val = i2c_smbus_read_word_swapped(client,
|
|
JC42_REG_TEMP_CRITICAL);
|
|
if (val < 0) {
|
|
ret = ERR_PTR(val);
|
|
goto abort;
|
|
}
|
|
data->temp_crit = val;
|
|
|
|
val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
|
|
if (val < 0) {
|
|
ret = ERR_PTR(val);
|
|
goto abort;
|
|
}
|
|
data->temp_min = val;
|
|
|
|
val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
|
|
if (val < 0) {
|
|
ret = ERR_PTR(val);
|
|
goto abort;
|
|
}
|
|
data->temp_max = val;
|
|
|
|
data->last_updated = jiffies;
|
|
data->valid = true;
|
|
}
|
|
abort:
|
|
mutex_unlock(&data->update_lock);
|
|
return ret;
|
|
}
|
|
|
|
module_i2c_driver(jc42_driver);
|
|
|
|
MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
|
|
MODULE_DESCRIPTION("JC42 driver");
|
|
MODULE_LICENSE("GPL");
|