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a96cbb146a
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # samsung Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # versaclock5 Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org Acked-by: Abel Vesa <abel.vesa@linaro.org> #imx Signed-off-by: Stephen Boyd <sboyd@kernel.org>
66 lines
2 KiB
C
66 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: James Liao <jamesjj.liao@mediatek.com>
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* Fabien Parent <fparent@baylibre.com>
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* Copyright (c) 2023 Collabora Ltd.
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*/
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#include <linux/clk-provider.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt8516-clk.h>
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static const struct mtk_gate_regs aud_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x0,
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.sta_ofs = 0x0,
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};
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#define GATE_AUD(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
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static const struct mtk_gate aud_clks[] = {
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GATE_AUD(CLK_AUD_AFE, "aud_afe", "clk26m_ck", 2),
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GATE_AUD(CLK_AUD_I2S, "aud_i2s", "i2s_infra_bck", 6),
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GATE_AUD(CLK_AUD_22M, "aud_22m", "rg_aud_engen1", 8),
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GATE_AUD(CLK_AUD_24M, "aud_24m", "rg_aud_engen2", 9),
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GATE_AUD(CLK_AUD_INTDIR, "aud_intdir", "rg_aud_spdif_in", 15),
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GATE_AUD(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner", "rg_aud_engen2", 18),
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GATE_AUD(CLK_AUD_APLL_TUNER, "aud_apll_tuner", "rg_aud_engen1", 19),
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GATE_AUD(CLK_AUD_HDMI, "aud_hdmi", "apll12_div4", 20),
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GATE_AUD(CLK_AUD_SPDF, "aud_spdf", "apll12_div6", 21),
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GATE_AUD(CLK_AUD_ADC, "aud_adc", "aud_afe", 24),
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GATE_AUD(CLK_AUD_DAC, "aud_dac", "aud_afe", 25),
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GATE_AUD(CLK_AUD_DAC_PREDIS, "aud_dac_predis", "aud_afe", 26),
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GATE_AUD(CLK_AUD_TML, "aud_tml", "aud_afe", 27),
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};
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static const struct mtk_clk_desc aud_desc = {
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.clks = aud_clks,
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.num_clks = ARRAY_SIZE(aud_clks),
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};
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static const struct of_device_id of_match_clk_mt8516_aud[] = {
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{ .compatible = "mediatek,mt8516-audsys", .data = &aud_desc },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, of_match_clk_mt8516_aud);
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static struct platform_driver clk_mt8516_aud_drv = {
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.probe = mtk_clk_simple_probe,
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.remove_new = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt8516-aud",
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.of_match_table = of_match_clk_mt8516_aud,
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},
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};
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module_platform_driver(clk_mt8516_aud_drv);
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MODULE_DESCRIPTION("MediaTek MT8516 audiosys clocks driver");
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MODULE_LICENSE("GPL");
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